參數(shù)資料
型號: AD5663BRMZ
廠商: Analog Devices Inc
文件頁數(shù): 1/24頁
文件大小: 0K
描述: IC DAC NANO 16BIT DUAL 10-MSOP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 50
系列: nanoDAC™
設(shè)置時間: 4µs
位數(shù): 16
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 單電源
功率耗散(最大): 2.5mW
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 10-MSOP
包裝: 管件
輸出數(shù)目和類型: 2 電壓,單極;2 電壓,雙極
采樣率(每秒): 220k
產(chǎn)品目錄頁面: 783 (CN2011-ZH PDF)
配用: EVAL-AD5663REBZ-ND - BOARD EVAL FOR AD5663
2.7 V to 5.5 V, 250 μA, Rail-to-Rail Output,
Dual 16-Bit nanoDAC
AD5663
Rev. 0
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responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
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Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2006 Analog Devices, Inc. All rights reserved.
FEATURES
Low power, dual 16-bit nanoDAC
Relative accuracy: ±12 LSBs maximum
Guaranteed monotonic by design
10-lead MSOP and 3 mm × 3 mm LFCSP_WD
2.7 V to 5.5 V power supply
Per channel power-down
Power-on reset to zero scale or midscale
Hardware LDAC and CLR functions
Serial interface; up to 50 MHz
APPLICATIONS
Process control
Data acquisition systems
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
Programmable attenuators
FUNCTIONAL BLOCK DIAGRAM
INTERFACE
LOGIC
SCLK
SYNC
DIN
CLR
INPUT
REGISTER
INPUT
REGISTER
DAC
REGISTER
DAC
REGISTER
VDD
GND
POWER-ON
RESET
STRING
DAC A
STRING
DAC B
BUFFER
VREF
POWER-DOWN
LOGIC
VOUTA
VOUTB
AD5663
LDAC
058
55-
001
Figure 1.
Table 1. Related Devices
Part No.
Description
2.7 V to 5.5 V, dual 12-/14-/16-bit
DACs with internal reference
GENERAL DESCRIPTION
The AD5663, a member of the nanoDAC family, is a low power,
dual, 16-bit buffered voltage-out DAC that operates from a single
2.7 V to 5.5 V supply and is guaranteed monotonic by design.
The AD5663 requires an external reference voltage to set the
output range of the DAC. The part incorporates a power-on
reset circuit that ensures the DAC output powers up to 0 V or
midscale (AD5663-1) and remains there until a valid write takes
place. The part contains a power-down feature that reduces the
current consumption of the device to 480 nA at 5 V and provides
software-selectable output loads while in power-down mode.
The low power consumption of this part in normal operation
makes it ideally suited to portable, battery-operated equipment.
The power consumption is 1.25 mW at 5 V, going down to
2.4 μW in power-down mode.
The on-chip precision output amplifier of the AD5663 allows
rail-to-rail output swing to be achieved.
The AD5663 uses a versatile, 3-wire serial interface that
operates at clock rates up to 50 MHz and is compatible with
standard SPI, QSPI, MICROWIRE, and DSP interface
standards.
PRODUCT HIGHLIGHTS
1.
Dual 16-bit DAC; relative accuracy of ±12 LSBs maximum.
2.
Available in 10-lead MSOP and 10-lead, 3 mm × 3 mm
LFCSP_WD packages.
3.
Low power; typically consumes 0.6 mW at 3 V and
1.25 mW at 5 V.
4.
7 μs maximum settling time.
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