參數(shù)資料
型號: AD569AD
廠商: Analog Devices Inc
文件頁數(shù): 5/12頁
文件大小: 0K
描述: IC DAC 16BIT MONO 28-CDIP
產(chǎn)品培訓模塊: Data Converter Fundamentals
DAC Architectures
標準包裝: 1
設置時間: 4µs
位數(shù): 16
數(shù)據(jù)接口: 并聯(lián)
轉換器數(shù)目: 1
電壓電源: 雙 ±
工作溫度: -25°C ~ 85°C
安裝類型: 通孔
封裝/外殼: 28-CDIP(0.605",15.37mm)
供應商設備封裝: 28-CDIP
包裝: 管件
輸出數(shù)目和類型: 1 電壓,單極;1 電壓,雙極
采樣率(每秒): *
AD569–SPECIFICATIONS
Model
AD569JN/JP/AD
AD569KN/KP/BD
AD569SD
Parameter
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Units
RESOLUTION
16
Bits
LOGIC INPUTS
VIH(Logic “l(fā)”)
2.0
5.5
2.0
5.5
2.0
5.5
Volts
VIL (Logic “0”)
0
0.8
0
0.8
0
0.8
Volts
IIH (VIH = 5.5 V)
10
A
IIL (VIL = 0 V)
10
A
TRANSFER FUNCTION
CHARACTERISTICS
Integral Nonlinearity
±0.02
0.04
±0.01
0.024
0.04
% FSR
1
TMIN to TMAX
±0.02
0.04
±0.020
0.024
0.04
% FSR
Differential Nonlinearity
±1/2
1
±1/4
1/2
1
LSB
TMIN to TMAX
±1/2
1
±1/2
1
LSB
Unipolar Offset
2
500
350
500
V
TMIN to TMAX
750
450
750
V
Bipolar Offset
2
500
350
500
V
TMIN to TMAX
750
450
750
V
Full Scale Error
2
350
V
TMIN to TMAX
750
V
Bipolar Zero
2
0.04
0.024
0.04
% FSR
TMIN to TMAX
0.04
0.024
0.04
% FSR
REFERENCE INPUT
+VREF Range
3
–5
+5
–5
+5
–5
+5
Volts
–VREF Range
–5
+5
–5
+5
–5
+5
Volts
Resistance
15
20
25
15
20
25
15
20
25
k
4
OUTPUT CHARACTERISTICS
Voltage
–5
+5
–5
+5
–5
+5
Volts
Capacitive Load
1000
pF
Resistive Load
1
k
Short Circuit Current
10
mA
POWER SUPPLIES
Voltage
+VS
+10.8
+12
+13.2
+10.8
+12
+13.2
+10.8
+12
+13.2
Volts
–VS
–10.8
–12
–13.2
–10.8
–12
–13.2
–10.8
–12
–13.2
Volts
Current
+IS
+9
+13
+9
+13
+9
+13
mA
–IS
–9
–13
–9
–13
–9
–13
mA
Power Supply Sensitivity
5
+10.8 V
≤ +V
S ≤ +13.2 V
±0.5
2
±0.5
2
±0.5
2
ppm/%
–10.8 V
≥ –V
S ≥ –13.2 V
±1
3
±1
3
±1
3
ppm/%
TEMPERATURE RANGE
Specified
JN, KN, JP, KP
0
+70
0
+70
°C
AD, BD
–25
+85
–25
+85
°C
SD
–55
+125
°C
Storage
JN, KN, JP, KP
–65
+150
–65
+150
°C
AD, BD, SD
–65
+150
–65
+150
–65
+150
°C
NOTES
1FSR stands for Full-Scale Range, and is 10 V for a –5 V to +5 V span.
2Refer to Definitions section.
3For operation with supplies other than
± 12 V, refer to the Power Supply and Reference Voltage Range Section.
4Measured between +V
REF Force and –VREF Force.
5Sensitivity of Full-Scale Error due to changes in +V
S and sensitivity of Offset to changes in –VS.
Specifications subject to change without notice.
Specifications shown in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. All min
and max specifications are guaranteed, although only those shown in boldface are tested on all production units.
(TA = +25 C, +VS = +12 V, –VS = –12 V, +VREF = +5 V, –VREF = –5 V, unless
otherwise noted.)
REV. A
–2–
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