參數(shù)資料
型號: AD569JP-REEL
廠商: Analog Devices Inc
文件頁數(shù): 10/12頁
文件大?。?/td> 0K
描述: IC DAC 16BIT MONO NON-LIN 28PLCC
產品培訓模塊: Data Converter Fundamentals
DAC Architectures
標準包裝: 750
設置時間: 4µs
位數(shù): 16
數(shù)據(jù)接口: 并聯(lián)
轉換器數(shù)目: 1
電壓電源: 雙 ±
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 28-LCC(J 形引線)
供應商設備封裝: 28-PLCC(11.51x11.51)
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 1 電壓,單極;1 電壓,雙極
采樣率(每秒): *
AD569
REV. A
–7–
benefit is that, should a Zener diode fail (a short circuit would
be the most likely failure), the supply voltage decreases. This
differs from the situation where the diode is used as a series
regulator. In that case, a failure would place the unregulated
supply voltage on the AD569 terminal.
a. Zener Regulates Negative Supply
b. Diodes Regulate Both Supplies
c. Use of
±15 V and ±5 V Supplies
d. AD588 Produces References and Supply Voltages
Figure 7. Power Supply Options
ANALOG CIRCUIT CONNECTIONS
The AD569 is intended for use in applications where high reso-
lution and stability are critical. Designed as a multiplying D/A
converter, the AD569 may be used with a fixed dc reference or
an ac reference. VREF may be any voltage or combination of
voltages at +VFORCE and –VFORCE that remain within the bounds
set for reference voltages as discussed in the power supply range
section. Since the AD569 is a multiplying D/A converter, its
output voltage, VOUT, is proportional to the product of the digi-
tal input word and the voltage at the reference terminal. The
transfer function is VOUT = DVREF where D is the fractional bi-
nary value of the digital word applied to the converter using
offset-binary coding. Therefore, the output will range from
–VREF for a digital input code of all zeros (0000H) to +VREF for
an input code of all ones (FFFFH).
For applications where absolute accuracy is not critical, the
simple reference connection in Figure 8 can be used. Using only
the reference force inputs, this configuration maintains linearity
and 16-bit monotonicity, but introduces small, fixed offset and
gain errors. These errors are due to the voltage drops across re-
sistors RA and RB shown in Figure 9. With a 10 V reference
voltage, the gain and offset errors will range from 80 mV to
100 mV. Resistors RA and RB were included in the first resistor
string to avoid degraded linearity due to uneven current densi-
ties at the string’s endpoints. Similarly, linearity would degrade
if the reference voltage were connected across the reference
sense terminals. Note that the resistance between the force and
sense terminals cannot be measured with an ohmmeter; the lay-
out of the thin-film resistor string adds approximately 4 k
of
resistance (RS) at the sense tap.
Figure 8. Simple Reference Connection
For those applications in which precision references and high
accuracy are critical, buffer amplifiers are used at +VREF and
–VREF as shown in Figure 10 to force the voltage across resistors
R1 to R256. This insures that any errors induced by currents
flowing through the resistances of the package pins, bond wires,
aluminum interconnections, as well as RA and RB are mini-
mized. Suitable amplifiers are the AD517, AD OP07, AD OP27,
or the dual amplifier, the AD712. Errors will arise, however, as
the buffer amplifiers’ bias currents flow through RS (4 k
). If
the bias currents produce such errors, resistance can be inserted
at the noninverting terminal (RBC) of the buffer amplifiers to
compensate for the errors.
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