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| 型號(hào)： | AD5726YRSZ-500RL7 |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 5/20頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 12BIT QUAD SERIAL 16SSOP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | iCMOS® |
| 設(shè)置時(shí)間： | 9µs |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 4 |
| 電壓電源： | 雙 ± |
| 功率耗散（最大）： | 30mW 單極；240mW 雙極 |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 16-SSOP（0.209"，5.30mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SSOP |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 輸出數(shù)目和類(lèi)型： | * |
| 其它名稱(chēng)： | AD5726YRSZ-500RL7DKR |
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Data Sheet
AD5726
Rev. C | Page 13 of 20
THEORY OF OPERATION
The AD5726 is a quad, 12-bit, serial input, unipolar/bipolar
voltage output DAC. It operates from single-supply voltages of
+5 V to +15 V or dual-supply voltages of ±5 V to ±15 V. The
four outputs are buffered and capable of driving a 2 k load.
Data is written to the AD5726 in a 16-bit word format via a
3-wire serial interface.
DAC ARCHITECTURE
Each of the four DACs is a voltage switched, high impedance
(50 k), R-2R ladder configuration. Each 2R resistor is driven by a
pair of switches that connect the resistor to either VREFP or VREFN.
OUTPUT AMPLIFIERS
The AD5726 features buffered analog voltage outputs capable of
sourcing and sinking up to 5 mA when operating from ±15 V
supplies, eliminating the need for external buffer amplifiers in
most applications while maintaining specified accuracy over the
rated operating conditions. The output amplifiers are short-circuit
protected. The designer should verify that the output load meets
the capabilities of the device, in terms of both output current and
load capacitance. The AD5726 is stable with capacitive loads up
to 2 nF typically. However, any capacitance load increases the
settling time and should be minimized if speed is a concern.
The output stage includes a P-channel MOSFET to pull the
output voltage down to the negative supply. This is very impor-
tant in single-supply systems where VREFN usually has the same
potential as the negative supply. With no load, the zero-scale
output voltage in these applications is less than 500 V typically,
or less than 1 LSB when VREFP = 2.5 V. However, when sinking
current, this voltage increases because of the finite impedance
of the output stage. The effective value of the pull-down resistor
in the output stage is typically 320 . With a 100 k resistor
connected to 5 V, the resulting zero-scale output voltage is
16 mV. Thus, the best single-supply operation is obtained with
the output load connected to ground, so the output stage does
not have to sink current.
Like all amplifiers, the AD5726 output buffers generate voltage
noise, 5 nV/√Hz typically. This is easily reduced by adding a
simple RC low-pass filter on each output.
REFERENCE INPUTS
The two reference inputs of the AD5726 allow a great deal of
flexibility in circuit design. The user must take care, however,
to observe the minimum voltage input levels on VREFP and VREFN
to maintain the accuracy shown in the data sheet. These input
voltages can be set anywhere across a wide range within the
supplies, but must be a minimum of 2.5 V apart in any case
(see Figure 24). A wide output voltage range can be obtained
with ±5 V references that can be provided by the AD588 as
shown in Figure 26. Many applications utilize the DACs to
synthesize symmetric bipolar waveforms, which require an
accurate, low drift bipolar reference. The AD588 provides both
voltages and needs no external components. Additionally, the
part is trimmed in production for 12-bit accuracy over the full
temperature range without user calibration.
1 LSB
0x000
+2.5V MIN
AVDD
VREFP
VREFN
AVSS
–10V MIN
+2.5V MIN
0xFFF
0V MIN
06469-
022
Figure 24. Output Voltage Range Programming
When driving the reference input, it is important to note that
VREFP both sinks and sources current, and that the input currents
of both are code dependent. Many voltage reference products
have limited current sinking capabilities and must be buffered
with an amplifier to drive VREFP to maintain overall system accu-
racy. The input, VREFN, however, has no such requirement.
For a single 5 V supply, VREFP is limited to 2.5 V at the most, and
must always be at least 2.5 V less than the positive supply toensure
linearity of the device. For these applications, the AD780 is an
excellent lowdrift 2.5 V reference. It works well with the AD5726
in a single 5 V system, as shown in Figure 28.
It is recommended that the reference inputs be bypassed with
0.2 F capacitors when operating with ±10 V references. This
limits the reference bandwidth.
VREFP Input Requirements
The AD5726 uses a DAC switch driver circuit that compensates
for different supplies, reference voltages, and digitalcode inputs.
This ensures that all DAC ladder switches are always biased
equally, ensuring excellent linearity under all conditions. Thus,
requires both sourcing and sinking current capability from the
reference voltage source. Many positive voltage references are
intended as current sources only and offer little sinking capability.
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| AD5726YRSZ-REEL | 功能描述:IC DAC 12BIT QUAD SERIAL 16-SSOP RoHS:是 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:iCMOS® 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 設(shè)置時(shí)間:4µs 位數(shù):12 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:8-uMAX 包裝:管件 輸出數(shù)目和類(lèi)型:2 電壓，單極 采樣率（每秒）:* 產(chǎn)品目錄頁(yè)面:1398 (CN2011-ZH PDF) |
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