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參數(shù)資料
| 型號： | AD5748ACPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 20/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC I/V OUTPUT DRIVER 32LFCSP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 放大器類型： | 儀表 |
| 電路數(shù)： | 1 |
| 轉(zhuǎn)換速率： | 2 V/µs |
| 電流 - 輸出 / 通道： | 15mA |
| 電壓 - 電源，單路/雙路(±)： | ±12 V ~ 24 V |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 32-LFCSP-VQ（5x5） |
| 包裝： | 管件 |
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AD5748
Rev. A | Page 27 of 32
Readback Operation
Readback mode is activated by selecting the correct device address
(A2, A1, A0) and then setting the R/W bit to 1. By default, the
SDO pin is disabled. After having addressed the AD5748 for a
read operation, setting R/W to 1 enables the SDO pin and SDO
data is clocked out on the 5th rising edge of SCLK. After the data
has been clocked out on SDO, a rising edge on SYNC disables
(tristate) the SDO pin again. Status register data (see
)
and control register data are both available during the same
read cycle.
The status bits comprise four read-only bits. They are used to
notify the user of specific fault conditions that occur, such as
an open circuit or short circuit on the output, overtemperature
error, or an interface error. If any of these fault conditions occurs,
a hardware FAULT is also asserted low, which can be used as a
hardware interrupt to the controller.
See the Detailed Description of Features section for a full
explanation of fault conditions.
HARDWARE CONTROL
Hardware control is enabled by connecting the HW SELECT
pin to DVCC. In this mode, the R3, R2, R1, and R0 pins in
conjunction with the RSET pin are used to configure the
output range, as per Table 7.
In hardware mode, there is no status register. The fault condi-
tions (open circuit, short circuit, and overtemperature) are
available on Pin IFAULT, Pin VFAULT, and Pin TEMP. If any
one of these fault conditions is set, then a low is asserted on the
specific fault pin. IFAULT, VFAULT, and TEMP are open-drain
outputs and, therefore, can be connected together to allow the
user to generate one interrupt to the system controller to commu-
nicate a fault. If hardwired in this way, it is not possible to
isolate which fault occurred in the system.
TRANSFER FUNCTION
The AD5748 consists of an internal signal conditioning block
that maps the analog input voltage to a programmed output
range. The available analog input range is 0 V to 4.096 V.
For all ranges, both current and voltage, the AD5748 imple-
ments a straight linear mapping function. 0 V maps to the
lower end of the selected range; 4.096 V maps to the upper
end of the selected range.
Table 8. Input Shift Register Contents for a Read Operation—Status Register
MSB
LSB
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
A2
A1
A0
1
0
R3
R2
R1
R0
CLRSEL
OUTEN
RSET
PEC error
OVER TEMP
IOUT fault
VOUT fault
Table 9. Status Bit Options
Bit
Description
PEC Error
This bit is set if there is an interface error detected by CRC-8 error checking. See the Detailed Description of Features section.
VOUT Fault
This bit is set if there is a short circuit on the VOUT pin.
IOUT Fault
This bit is set is there is an open circuit on the IOUT pin.
OVER TEMP
This bit is set if the AD5748 core temperature exceeds approximately 150°C.
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| AD5748ACPZ-RL7 | 功能描述:IC I/V OUTPUT DRIVER 32LFCSP RoHS:是 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 放大器類型:電流檢測 電路數(shù):1 輸出類型:- 轉(zhuǎn)換速率:- 增益帶寬積:125kHz -3db帶寬:- 電流 - 輸入偏壓:- 電壓 - 輸入偏移:100µV 電流 - 電源:1.1µA 電流 - 輸出 / 通道:- 電壓 - 電源，單路/雙路(±):- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:4-WFBGA，CSPBGA 供應(yīng)商設(shè)備封裝:4-UCSP（2x2） 包裝:剪切帶 (CT) 其它名稱:MAX9634WERS+TCT |
| AD5749 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Industrial Current Out Driver, Single-Supply, 55 V Maximum Supply, Programmable Ranges |
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| AD574A | 制造商:AD 制造商全稱:Analog Devices 功能描述:Complete 12-Bit A/D Converter |
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