SUPPLY VOLTAGES (AV
參數(shù)資料
型號： AD5750BCPZ-REEL
廠商： Analog Devices Inc
文件頁數(shù)： 10/36頁
文件大?。?/td> 0K
描述： IC CURR/VOLT OUT DVR 32LFCSP
標準包裝： 5,000
放大器類型： 儀表
電路數(shù)： 1
轉(zhuǎn)換速率： 2 V/µs
電流 - 電源： 5.2mA
電流 - 輸出 / 通道： 24mA
電壓 - 電源，單路/雙路(±)： ±10.8 V ~ 26.4 V
工作溫度： -40°C ~ 105°C
安裝類型： 表面貼裝
封裝/外殼： 32-VFQFN 裸露焊盤，CSP
供應商設備封裝： 32-LFCSP-VQ（5x5）
包裝： 帶卷 (TR)
AD5750/AD5750-1
Rev. C | Page 18 of 36
0.10
–0.10
–0.08
–0.06
–0.04
–0.02
0
0.02
0.04
0.06
0.08
TU
E
(
%
FS
R
)
SUPPLY VOLTAGES (AVDD/AVSS)
+11.2/–10.8
±15.0
±24.0
±26.4
+4mA TO +20mA EXTERNAL RSET POSITIVE TUE
0mA TO +20mA EXTERNAL RSET POSITIVE TUE
0mA TO +24mA EXTERNAL RSET POSITIVE TUE
±20mA EXTERNAL RSET POSITIVE TUE
±24mA EXTERNAL RSET POSITIVE TUE
+4mA TO +20mA EXTERNAL RSET NEGATIVE TUE
0mA TO +20mA EXTERNAL RSET NEGATIVE TUE
0mA TO +24mA EXTERNAL RSET NEGATIVE TUE
±20mA EXTERNAL RSET NEGATIVE TUE
±24mA EXTERNAL RSET NEGATIVE TUE
07
26
8-
13
0
Figure 30. Total Unadjusted Error Current Mode, External RSET Sense Resistor
0.10
–0.10
–0.08
–0.06
–0.04
–0.02
0
0.02
0.04
0.06
0.08
TU
E
(
%
FS
R
)
SUPPLY VOLTAGES (AVDD/AVSS)
+11.2/–10.8
±15.0
±24.0
±26.4
+4mA TO +20mA INTERNAL RSET POSITIVE TUE
0mA TO +20mA INTERNAL RSET POSITIVE TUE
0mA TO +24mA INTERNAL RSET POSITIVE TUE
±20mA INTERNAL RSET POSITIVE TUE
±24mA INTERNAL RSET POSITIVE TUE
+4mA TO +20mA INTERNAL RSET NEGATIVE TUE
0mA TO +20mA INTERNAL RSET NEGATIVE TUE
0mA TO +24mA INTERNAL RSET NEGATIVE TUE
±20mA INTERNAL RSET NEGATIVE TUE
±24mA INTERNAL RSET NEGATIVE TUE
07
26
8-
13
1
Figure 31. Total Unadjusted Error Current Mode, Internal RSET Sense Resistor
105
25
–40
TEMPERATURE (°C)
0.010
–0.010
–0.008
–0.006
–0.004
–0.002
0
0.002
0.004
0.006
0.008
L
INE
AR
IT
Y
(
%
F
S
R)
+4mA TO +20mA INTERNAL RSET LINEARITY
0mA TO +20mA INTERNAL RSET LINEARITY
0mA TO +24mA INTERNAL RSET LINEARITY
±20mA INTERNAL RSET LINEARITY
±24mA INTERNAL RSET LINEARITY
AVDD = +24V
AVSS = –24V
07
26
8-
1
32
Figure 32. INL vs. Temperature, Internal RSET Sense Resistor
105
25
–40
TEMPERATURE (°C)
0.010
–0.010
–0.008
–0.006
–0.004
–0.002
0
0.002
0.004
0.006
0.008
L
INE
AR
IT
Y
(
%
F
S
R)
+4mA TO +20mA EXTERNAL RSET LINEARITY
0mA TO +20mA EXTERNAL RSET LINEARITY
0mA TO +24mA EXTERNAL RSET LINEARITY
±20mA EXTERNAL RSET LINEARITY
±24mA EXTERNAL RSET LINEARITY
AVDD = +24V
AVSS = –24V
07
26
8-
1
33
Figure 33. INL vs. Temperature, External RSET Sense Resistor
105
25
–40
TEMPERATURE (°C)
0.10
–0.10
–0.08
–0.06
–0.04
–0.02
0
0.02
0.04
0.06
0.08
TU
E
(
%
FS
R
)
+4mA TO +20mA INTERNAL RSET POSITIVE TUE
0mA TO +20mA INTERNAL RSET POSITIVE TUE
0mA TO +24mA INTERNAL RSET POSITIVE TUE
±20mA INTERNAL RSET POSITIVE TUE
±24mA INTERNAL RSET POSITIVE TUE
+4mA TO +20mA INTERNAL RSET NEGATIVE TUE
0mA TO +20mA INTERNAL RSET NEGATIVE TUE
0mA TO +24mA INTERNAL RSET NEGATIVE TUE
±20mA INTERNAL RSET NEGATIVE TUE
±24mA INTERNAL RSET NEGATIVE TUE
07
26
8-
1
34
Figure 34. Total Unadjusted Error vs. Temperature, Internal RSET Sense Resistor
0.10
–0.10
–0.08
–0.06
–0.04
–0.02
0
0.02
0.04
0.06
0.08
TU
E
(
%
FS
R
)
+4mA TO +20mA EXTERNAL RSET POSITIVE TUE
0mA TO +20mA EXTERNAL RSET POSITIVE TUE
0mA TO +24mA EXTERNAL RSET POSITIVE TUE
±20mA EXTERNAL R SET POSITIVE TUE
±24mA EXTERNAL R SET POSITIVE TUE
+4mA TO +20mA EXTERNAL RSET NEGATIVE TUE
0mA TO +20mA EXTERNAL RSET NEGATIVE TUE
0mA TO +24mA EXTERNAL RSET NEGATIVE TUE
±20mA EXTERNAL R SET NEGATIVE TUE
±24mA EXTERNAL R SET NEGATIVE TUE
105
25
–40
TEMPERATURE (°C)
07
26
8-
1
35
Figure 35. Total Unadjusted Error vs. Temperature, External RSET Sense Resistor
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