AD5763
Data Sheet
Rev. C | Page 4 of 29
SPECIFICATIONS
AVDD = 4.75 V to 5.25 V, AVSS = 5.25 V to 4.75 V, AGNDx = DGND = REFGND = PGND = 0 V, REFA = REFB = 2.048 V,
DVCC = 2.7 V to 5.25 V, RLOAD = 5 kΩ, CLOAD = 200 pF. All specifications TMIN to TMAX, unless otherwise noted.
Table 2.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
ACCURACY
Outputs unloaded
Resolution
16
Bits
Relative Accuracy (INL)
1
+1
LSB
Differential Nonlinearity (DNL)
1
+1
LSB
Guaranteed monotonic
Bipolar Zero Error
2
+2
mV
At 25°C
3
+3
mV
±1
ppm FSR/°C
Zero-Scale Error
2
+2
mV
At 25°C
3.5
+3.5
mV
Zero-Scale Temperature Coefficient
±1
ppm FSR/°C
Gain Error
0.03
+0.03
% FSR
At 25°C, coarse gain register = 0
0.04
+0.04
% FSR
Coarse gain register = 0
±1
ppm FSR/°C
0.5
LSB
Reference Input Voltage
2.048
V nominal
±1% for specified performance
DC Input Impedance
1
MΩ
Typically 100 MΩ
Input Current
0.03
10
μA
Reference Range
1
2.1
V
4.31158
+4.31158
V
Coarse gain register = 2
4.20103
+4.20103
V
Coarse gain register = 1
4.096
+4.096
V
Coarse gain register = 0
4.42105
+4.42105
V
REFA = REFB = 2.1 V, coarse gain register = 2
Output Voltage Drift vs. Time
±32
ppm FSR/500 hrs
±37
ppm FSR/1000 hrs
Short-Circuit Current
10
mA
Load Current
1
+1
mA
For specified performance
Capacitive Load Stability
RLOAD = ∞
200
pF
RLOAD = 10 kΩ
1000
pF
DC Output Impedance
0.3
Ω
JEDEC compliant
Input High Voltage, VIH
2
V
Input Low Voltage, VIL
0.8
V
Input Current
1
+1
μA
Per pin
Pin Capacitance
10
pF
Per pin
DIGITAL OUTPUTS (D0, D1, SD
O)1Output Low Voltage
0.4
V
DVCC = 5 V ± 5%, sinking 200 μA
Output High Voltage
DVCC 1
V
DVCC = 5 V ± 5%, sourcing 200 μA
Output Low Voltage
0.4
V
DVCC = 2.7 V to 3.6 V, sinking 200 μA
Output High Voltage
DVCC 0.5
V
DVCC = 2.7 V to 3.6 V, sourcing 200 μA
High Impedance Leakage Current
±1
μA
SDO only
High Impedance Output
Capacitance
5
pF
SDO only