參數(shù)資料
型號: AD5764ASUZ
廠商: Analog Devices Inc
文件頁數(shù): 24/28頁
文件大小: 0K
描述: IC DAC 16BIT QUAD VOUT 32-TQFP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
產(chǎn)品變化通告: AD5764(R), AD5744R Product Change 04/Sept/2009
設(shè)計(jì)資源: High Accuracy, Bipolar Voltage Output Digital-to-Analog Conversion Using AD5764 (CN0006)
標(biāo)準(zhǔn)包裝: 1
設(shè)置時(shí)間: 8µs
位數(shù): 16
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 4
電壓電源: 雙 ±
功率耗散(最大): 275 mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-TQFP
供應(yīng)商設(shè)備封裝: 32-TQFP(7x7)
包裝: 托盤
輸出數(shù)目和類型: 4 電壓,雙極
采樣率(每秒): 1.26M
產(chǎn)品目錄頁面: 784 (CN2011-ZH PDF)
配用: EVAL-AD5764EBZ-ND - BOARD EVAL FOR AD5764
Data Sheet
AD5764
Rev. F | Page 5 of 28
Parameter
A Grade
B Grade
C Grade
Unit
Test Conditions/Comments
DIGITAL OUTPUTS (D0, D1, SDO)1
Output Low Voltage
0.4
V max
DVCC = 5 V ± 5%, sinking 200 μA
Output High Voltage
DVCC 1
V min
DVCC = 5 V ± 5%, sourcing 200 μA
Output Low Voltage
0.4
V max
DVCC = 2.7 V to 3.6 V, sinking 200 μA
Output High Voltage
DVCC 0.5
V min
DVCC = 2.7 V to 3.6 V, sourcing 200 μA
High Impedance Leakage Current
±1
μA max
SDO only
High Impedance Output
Capacitance
5
pF typ
SDO only
POWER REQUIREMENTS
AVDD/AVSS
±11.4 to
±16.5
±11.4 to
±16.5
±11.4 to
±16.5
V min to V max
DVCC
2.7 to 5.25
V min to V max
Power Supply Sensitivity1
VOUT/ΑVDD
85
dB typ
AIDD
3.5
mA/channel max
Outputs unloaded
AISS
2.75
mA/channel max
Outputs unloaded
DICC
1.2
mA max
VIH = DVCC, VIL = DGND, 750 μA typical
Power Dissipation
275
mW typ
±12 V operation output unloaded
1 Guaranteed by design and characterization; not production tested.
2 Output amplifier headroom requirement is 1.4 V minimum.
AC PERFORMANCE CHARACTERISTICS
AVDD = 11.4 V to 16.5 V, AVSS = 11.4 V to 16.5 V, AGNDx = DGND = REFGND = PGND = 0 V; REFAB = REFCD = 5 V;
DVCC = 2.7 V to 5.25 V, RLOAD = 10 kΩ, CL = 200 pF. All specifications TMIN to TMAX, unless otherwise noted.
Table 3.
Parameter
A Grade
B Grade
C Grade
Unit
Test Conditions/Comments
DYNAMIC PERFORMANCE1
Output Voltage Settling Time
8
μs typ
Full-scale step to ±1 LSB
10
μs max
2
μs typ
512 LSB step settling
Slew Rate
5
V/μs typ
Digital-to-Analog Glitch Energy
8
nV-sec typ
Glitch Impulse Peak Amplitude
25
mV max
Channel-to-Channel Isolation
80
dB typ
DAC-to-DAC Crosstalk
8
nV-sec typ
Digital Crosstalk
2
nV-sec typ
Digital Feedthrough
2
nV-sec typ
Effect of input bus activity on DAC
outputs
Output Noise (0.1 Hz to 10 Hz)
0.1
LSB p-p typ
Output Noise (0.1 Hz to 100 kHz)
45
μV rms max
1/f Corner Frequency
1
kHz typ
Output Noise Spectral Density
60
nV/√Hz typ
Measured at 10 kHz
Complete System Output Noise Spectral
80
nV/√Hz typ
Measured at 10 kHz
1 Guaranteed by design and characterization; not production tested.
2 Includes noise contributions from integrated reference buffers, 16-bit DAC, and output amplifier.
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