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| 型號： | AD620BR-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 9/21頁 |
| 文件大小： | 0K |
| 描述： | IC AMP INST LP LN 18MA 8SOIC |
| 設(shè)計資源： | Low Cost Programmable Gain Instrumentation Amplifier Circuit Using ADG1611 and AD620 (CN0146) |
| 標準包裝： | 1 |
| 放大器類型： | 儀表 |
| 電路數(shù)： | 1 |
| 轉(zhuǎn)換速率： | 1.2 V/µs |
| -3db帶寬： | 1MHz |
| 電流 - 輸入偏壓： | 500pA |
| 電壓 - 輸入偏移： | 15µV |
| 電流 - 電源： | 900µA |
| 電流 - 輸出 / 通道： | 18mA |
| 電壓 - 電源，單路/雙路(±)： | 4.6 V ~ 36 V，±2.3 V ~ 18 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SO |
| 包裝： | 標準包裝 |
| 其它名稱： | AD620BR-REEL7DKR |
AD620
Rev. H | Page 16 of 20
signal according to the following relationship:
)
2
(
2
1
C
D
DIFF
C
R
FilterFreq
+
π
=
C
CM
RC
FilterFreq
π
=
2
1
where CD ≥10CC.
CD affects the difference signal. CC affects the common-mode
signal. Any mismatch in R × CC degrades the AD620 CMRR. To
avoid inadvertently reducing CMRR-bandwidth performance,
make sure that CC is at least one magnitude smaller than CD.
The effect of mismatched CCs is reduced with a larger CD:CC
ratio.
499
Ω
AD620
+
–
VOUT
R
CC
CD
CC
+IN
–IN
REF
–15V
0.1
μ F1 μ F
0
+15V
0.1
μ F1 μ F
0
00775-0-045
Figure 42. Circuit to Attenuate RF Interference
COMMON-MODE REJECTION
Instrumentation amplifiers, such as the AD620, offer high
CMR, which is a measure of the change in output voltage when
both inputs are changed by equal amounts. These specifications
are usually given for a full-range input voltage change and a
specified source imbalance.
For optimal CMR, the reference terminal should be tied to a
low impedance point, and differences in capacitance and
resistance should be kept to a minimum between the two
inputs. In many applications, shielded cables are used to
minimize noise; for best CMR over frequency, the shield
data guards that are configured to improve ac common-mode
rejections by “bootstrapping” the capacitances of input cable
shields, thus minimizing the capacitance mismatch between the
inputs.
REFERENCE
VOUT
AD620
100
Ω
100
Ω
– INPUT
+ INPUT
AD648
RG
–VS
+VS
–VS
00775-
0-
046
Figure 43. Differential Shield Driver
100
Ω
– INPUT
+ INPUT
REFERENCE
VOUT
AD620
–VS
+VS
2
RG
2
RG
AD548
00775-
0-
047
Figure 44. Common-Mode Shield Driver
GROUNDING
Since the AD620 output voltage is developed with respect to the
potential on the reference terminal, it can solve many
grounding problems by simply tying the REF pin to the
appropriate “l(fā)ocal ground.”
To isolate low level analog signals from a noisy digital
environment, many data-acquisition components have separate
analog and digital ground pins (Figure 45). It would be
convenient to use a single ground line; however, current
through ground wires and PC runs of the circuit card can cause
hundreds of millivolts of error. Therefore, separate ground
returns should be provided to minimize the current flow from
the sensitive points to the system ground. These ground returns
must be tied together at some point, usually best at the ADC
package shown in Figure 45.
DIGITAL P.S.
+5V
C
ANALOG P.S.
+15V C –15V
AD574A
DIGITAL
DATA
OUTPUT
+
1
μF
AD620
0.1
μ F
AD585
S/H
ADC
0.1
μ F
1
μF 1μF
00775-
0-
048
Figure 45. Basic Grounding Practice
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