TPC 25. Settling Time. VS = +5 V, G = 10 AD626 C1 5pF +IN" />
參數(shù)資料
型號(hào): AD626AR
廠商: Analog Devices Inc
文件頁(yè)數(shù): 2/13頁(yè)
文件大小: 0K
描述: IC AMP DIFF LP 12MA 8SOIC
標(biāo)準(zhǔn)包裝: 98
放大器類型: 差分
電路數(shù): 1
轉(zhuǎn)換速率: 0.22 V/µs
-3db帶寬: 100kHz
電壓 - 輸入偏移: 50µV
電流 - 電源: 1.5mA
電流 - 輸出 / 通道: 12mA
電壓 - 電源,單路/雙路(±): 2.4 V ~ 12 V,±1.2 V ~ 6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SO
包裝: 管件
AD626
–9–
10
90
100
0%
TPC 25. Settling Time. VS = +5 V, G = 10
AD626
C1
5pF
+IN
–IN
R1
200k
R2
200k
R3
41k
C2
5pF
R4
41k
R5
4.2k
R11
10k
R6
500
R7
500
R8
10k
R10
10k
R14
555
GND
GAIN = 100
R13
10k
R15
10k
R17
95k
R9
10k
R12
100k
FILTER
OUT
+VS
A1
A2
–VS
Figure 4. Simplied Schematic
10
90
100
0%
TPC 26. Settling Time. VS = +5 V, G = 100
10k
INPUT
20V p–p
1k
+VS
AD626
–VS
ERROR
OUT
2k
Figure 3. Settling Time Test Circuit
THEORY OF OPERATION
The AD626 is a differential amplier consisting of a precision
balanced attenuator, a very low drift preamplier (A1), and an
output buffer amplier (A2). It has been designed so that small
differential signals can be accurately amplied and ltered in the
presence of large common-mode voltages (VCM), without the use
of any other active components.
Figure 4 shows the main elements of the AD626. The signal inputs
at Pins 1 and 8 are rst applied to dual resistive attenuators R1
through R4 whose purpose is to reduce the peak common-mode
voltage at the input to the preamplier—a feedback stage based
on the very low drift op amp A1. This allows the differential
input voltage to be accurately amplied in the presence of large
common-mode voltages six times greater than that which can be
tolerated by the actual input to A1. As a result, the input CMR
extends to six times the quantity (VS – 1 V). The overall common-
mode error is minimized by precise laser-trimming of R3 and R4,
thus giving the AD626 a common-mode rejection ratio (CMRR)
of at least 10,000:1 (80 dB).
To minimize the effect of spurious RF signals at the inputs due to
rectication at the input to A1, small lter capacitors C1 and C2
are included.
The output of A1 is connected to the input of A2 via a 100 k
(R12) resistor to facilitate the low-pass ltering of the signal of
interest (see Low-Pass Filtering section).
The 200 k
input impedance of the AD626 requires that the source
resistance driving this amplier be low in value (<1 k )—this is
REV. D
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