VOUT 5V/DIV 1mV/DIV OUTPUT ERROR 0V +10V 10s/DIV 1mV = 0.01% " />
參數(shù)資料
型號: AD629BRZ-R7
廠商: Analog Devices Inc
文件頁數(shù): 16/16頁
文件大?。?/td> 0K
描述: IC AMP DIFF 25MA LDRIFT 8SOIC
設(shè)計資源: Measuring -48 V High-Side Current Using AD629, AD8603, AD780, and AD7453 (CN0100)
標(biāo)準(zhǔn)包裝: 1,000
放大器類型: 差分
電路數(shù): 1
轉(zhuǎn)換速率: 2.1 V/µs
-3db帶寬: 500kHz
電壓 - 輸入偏移: 100µV
電流 - 電源: 900µA
電流 - 輸出 / 通道: 25mA
電壓 - 電源,單路/雙路(±): 5 V ~ 36 V,±2.5 V ~ 18 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SO
包裝: 管件
AD629
Rev. C | Page 9 of 16
00
78
3-
02
4
VOUT
5V/DIV
1mV/DIV
OUTPUT
ERROR
0V
+10V
10s/DIV
1mV = 0.01%
Figure 25. Settling Time to 0.01%, for 0 V to 10 V Output Step; G = 1, RL = 2 kΩ
COMMON-MODE REJECTION RATIO (ppm)
NUM
BE
R
O
F
UNI
T
S
350
300
250
200
150
100
50
0
–150
–50
–100
50
0
150
100
00
78
3-
0
25
N = 2180
n ≈ 200 PCS. FROM
10 ASSEMBLY LOTS
Figure 26. Typical Distribution of Common-Mode Rejection; Package Option N-8
–1 GAIN ERROR (ppm)
NUM
BE
R
O
F
UNI
T
S
400
300
250
350
200
150
100
50
0
–600
–200
–400
200
0
600
400
00
78
3-
0
26
N = 2180
n ≈ 200 PCS. FROM
10 ASSEMBLY LOTS
Figure 27. Typical Distribution of 1 Gain Error; Package Option N-8
00
78
3-
02
7
VOUT
5V/DIV
1mV/DIV
OUTPUT
ERROR
0V
–10V
10s/DIV
1mV = 0.01%
Figure 28. Settling Time to 0.01% for 0 V to 10 V Output Step; G = 1, RL = 2kΩ
OFFSET VOLTAGE (V)
NUM
BE
R
O
F
UNI
T
S
300
250
200
150
100
50
0
–900
–300
–600
300
0
900
600
00
78
3-
0
28
N = 2180
n ≈ 200 PCS. FROM
10 ASSEMBLY LOTS
Figure 29. Typical Distribution of Offset Voltage; Package Option N-8
+1 GAIN ERROR (ppm)
NUM
BE
R
O
F
UNI
T
S
400
300
250
350
200
150
100
50
0
–600
–200
–400
200
0
600
400
00
78
3-
0
29
N = 2180
n ≈ 200 PCS. FROM
10 ASSEMBLY LOTS
Figure 30. Typical Distribution of +1 Gain Error; Package Option N-8
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