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參數(shù)資料
| 型號： | AD6402ARS-REEL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | IF Transceiver Subsystem |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PDSO28 |
| 封裝： | SSOP-28 |
| 文件頁數(shù)： | 3/8頁 |
| 文件大?。?/td> | 110K |
| 代理商： | AD6402ARS-REEL |
AD6402
–3–
REV. 0
WARNING!
ESD SENSITIVE DEVICE
C AUT ION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD6402 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. T herefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
RE COMME NDE D OPE RAT ING CONDIT IONS
VBAT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1 V–4.5 V
IFVCC1, IFVCC2, PLLVCC . . . . . . . . . . . . . . . . . . . .2.85 V
Operating T emperature Range . . . . . . . . . . . –25
°
C to +85
°
C
ABSOLUT E MAX IMUM RAT INGS*
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5.5 V
Storage T emperature Range . . . . . . . . . . . . –65
°
C to +150
°
C
Lead T emperature, Soldering (60 sec) . . . . . . . . . . . .+300
°
C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. T his is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended rating conditions for extended periods may affect device
reliability.
T hermal Characteristics:
28-lead SSOP package:
θ
JA
= 109
°
C/W.
ORDE RING GUIDE
T emperature
Range
–25
°
C to +85
°
C
–25
°
C to +85
°
C
Package
Description
28-Lead SSOP
28-Lead SSOP
Model
AD6402ARS
AD6402ARS-REEL
PIN CONFIGURAT ION
14
13
12
11
17
16
15
20
19
18
10
9
8
1
2
3
4
7
6
5
TOP VIEW
(Not to Scale)
28
27
26
25
24
23
22
21
AD6402
TXOUTB
IFIN
IFVCC1
REFSEL
TXOUT
MODOUT
FMMOD2
FMMOD1
IFVCC2
RSSI
IFGND
VCOGND
VCO
VREG
VBAT
CTL3
CTL2
SLREF
PLLVCC
PLLGND
CTL1
CFILT
COFF
REXT
DOUT
REFIN
PLLOUT
DFILP
PIN FUNCT ION DE SCRIPT IONS
Pin
1
2
3
4
5
6
7
Mnemonic
T X OUT B
MODOUT
FMMOD2
FMMOD1
VCOGND
VCO
VREG
Function
T ransmit IF VCO Buffer Inverting Output
Frequency Modulator Filter Op Amp Output
Frequency Modulator Filter Op Amp Noninverting input
Frequency Modulator Filter Op Amp Inverting input
IF VCO Ground
IF VCO T ank Connection
Regulated Supply Output for RF VCO (Supplies Internal IF VCO, Mode Control, Bandgap Reference,
and COFF Buffer)
Battery Supply Voltage Input to Internal Regulator and COFF Charge Pump
Mode Control Input 3, CMOS Logical Level
Mode Control Input 2, CMOS Logical Level
Mode Control Input 1, CMOS Logical Level
PLL Demodulator Loop Filter Capacitor
PLL Demodulator Frequency Offset Voltage T rack/Hold Capacitor
External Current-Setting Resistor
Baseband Reference Frequency Input, 100 mV p-p, AC Coupled
PLL Demodulator Output
Data Filter Voltage-Follower Input
Data Filter Voltage-Follower Output
PLL Demodulator Output DC Reference Voltage
PLL Demodulator and Data Filter Supply Input
PLL Demodulator and Data Filter Ground
IF Limiter Supply Input 1
RSSI Output
IF Stage, Mixer, Band Pass Filter, IF VCO Buffer, T x Op Amp, Mode Control, and Regulator Ground
IF Mixer Input, Z
O
= 150 Z
IF Mixer, Limiter 1, IF Filter, IF VCO Buffer
Reference Frequency Select; IF = 1.5
×
or 2.5
×
Reference Frequency, CMOS Logical Level Input
T ransmit IF VCO Buffer Output
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
VBAT
CT L3
CT L2
CT L1
CFILT
COFF
REX T
REFIN
PLLOUT
DFILP
DOUT
SLREF
PLLVCC
PLLGND
IFVCC2
RSSI
IFGND
IFIN
IFVCC1
REFSEL
T X OUT
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