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參數(shù)資料
| 型號： | AD6411AST |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | DECT RF Transceiver |
| 中文描述： | TRANSCEIVER, PQFP48 |
| 封裝： | PLASTIC, LQFP-48 |
| 文件頁數(shù)： | 6/11頁 |
| 文件大?。?/td> | 112K |
| 代理商： | AD6411AST |
AD6411
–6–
REV. 0
The block diagram shows the principle of operation of these two
modes together with the internal switch settings as shown in
Figure 2.
Table I. Supported Demodulation Modes
Mode
SW1
SW2
SW3
Comment
Prior to RX
SFS = Don’t Care
SFM = 0
Open
Closed Closed Precharge Loop
Filter and C Offset
Capacitor
Normal Demod –
Active RX
SFS = Don’t Care
SFM = 0
Open
Closed Open
Use Temperature
Compensated
Reference Voltage
S-Field Sample
SFS = 1
SFM = 1
Closed Open
Open
S-Field Hold
SFS = 0
SFM = 1
Open
Open
Open
An important consideration in normal demodulation mode is
any drift after the initial setup of the VCO. One mechanism is
the Capacitance vs. Temperature coefficient of the external
varactor. This has a known characteristic which is compensated
by an internal reference voltage generation circuit.
UHF VCO
A single UHF VCO oscillator is provided operating at one-half
the required frequency. Therefore, in transmit mode the
oscillator operates from (approximately) 940 MHz to 950 MHz,
and in receive mode the oscillator operates from (approxi-
mately) 884 MHz–895 MHz. This requires a switched resona-
tor design, and band switch control is provided by the AD6411.
A balanced oscillator configuration is used which has the advan-
tages of rejection of common-mode interference and noise, and
less coupling to and from other parts of the IC and radio.
Transmit Functions
The DECT transmit function is achieved by direct modulation
of the UHF VCO operating at half the final transmit output
frequency. An on-chip doubler converts this to the final carrier
frequency. In this mode the synthesizer is set to a high imped-
ance mode i.e., “fly-wheeled.” The drift is sufficiently low for
both single-slot and double-slot transmit operation.
Synthesizer and LO Functions
A complete synthesizer is implemented on the IC that is capable
of generating all the required DECT channel allocations (in-
cluding the extended DECT bands). This synthesizer can use
reference frequencies of either 13.824 MHz or 10.368 MHz,
controlled by the RD bit in the control register.
Synthesizer Programming
The required channels are programmed by setting the RD bit in
the control register to the correct value, then programming the
A and M Counters as shown below through the serial interface.
VCC
150nH
IFVCO
IF/110.592MHz
TC1
8pF
6.8pF
1k
V
ZC830
DATA FILTER
LOOP
FILTER
IFCP
96.768MHz
13.824MHz
GM1
IFLF
SW3
SW2
GM2
SW1
GM3
DMR
VREF
DEMOD DATA
COFF
VARACTOR
TEMP Co
COMPENSATION
AD6411
VREF
Figure 2. PLL Demodulator Block Diagram
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| AD641AP | 功能描述:IC AMP LOG LP 2.3MA 20PLCC RoHS:否 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 其它有關(guān)文件:TS1854A View All Specifications 標(biāo)準(zhǔn)包裝:50 系列:- 放大器類型:通用 電路數(shù):4 輸出類型:滿擺幅 轉(zhuǎn)換速率:0.25 V/µs 增益帶寬積:630kHz -3db帶寬:- 電流 - 輸入偏壓:16nA 電壓 - 輸入偏移:1000µV 電流 - 電源:162µA 電流 - 輸出 / 通道:48mA 電壓 - 電源，單路/雙路(±):1.8 V ~ 6 V 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:14-SO 包裝:管件 |
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