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參數(shù)資料
| 型號(hào)： | AD644 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Ceramic Multilayer Capacitor; Capacitance:22000pF; Capacitance Tolerance:+/- 10 %; Working Voltage, DC:50V; Dielectric Characteristic:X7R; Series:20110; Packaging:Cut Tape |
| 中文描述： | 雙路高速，注入BiFET運(yùn)算放大器 |
| 文件頁數(shù)： | 6/6頁 |
| 文件大?。?/td> | 255K |
| 代理商： | AD644 |
AD644
REV. A
–6–
C
P
Figure 27a illustrates the 10-bit digital-to-analog converter,
AD7533, connected for bipolar operation. Since the digital in-
put can accept bipolar numbers and V
REF
can accept a bipolar
analog input, the circuit can perform a 4-quadrant multiplying
function. T he photos exhibit the response to a step input at
V
REF
. Figure 27b is the large signal response and Figure 27c is
the small signal response.
T he output impedance of a CMOS DAC varies with the digital
word thus changing the noise gain of the amplifier circuit. T he
effect will cause a nonlinearity the magnitude of which is depen-
dent on the offset voltage of the amplifier. T he AD644K with
trimmed offset will minimize the effect. T he Schottky protection
diodes recommended for use with many older CMOS DACs are
not required when using the AD644.
ACT IVE FILT E RS
Literature on active filter techniques and characteristics based
on operational amplifiers is readily available. T he successful ap-
plication of an active filter however, depends on the component
selection to achieve the desired performance. T he AD644 is rec-
ommended for filters in medical, instrumentation, data acquisi-
tion and audio applications, because of its high gain bandwidth
figure, symmetrical slewing, low noise, and low 1 offset voltage.
T he state variable filter (Figure 28) is stable, easily tuned and is
independent of circuit Q and gain. T he use of the AD644 with
its low input bias current simplifies the resistor (R3, R4) selec-
tion for the passband center frequency, circuit Q and voltage
gain.
Figure 28. Band Pass State Variable Filter
T he sample and hold circuit, shown in Figure 29 is suitable for
use with 8-bit A/D converters. T he acquisition time using a
3900 pF capacitor and fast CMOS SPST (ADG200) switch is
15
μ
s.
T he droop rate is very low 25
×
10
–9
V/
μ
s due to the low input
bias currents of the AD644. Care should be taken to minimize
leakage paths. Leakages around the hold capacitor will increase
the droop rate and degrade performance.
Figure 29. Sample and Hold Circuit
T he AD644 in the circuit of Figure 30 provides highly accurate
signal conditioning with high frequency input signals. It pro-
vides an offset voltage drift of 10
μ
V/
°
C, CMRR of 80 dB over
the range of dc to 10 kHz and a bandwidth of 200 kHz (–3 dB)
at 1 V p-p output. T he circuit of Figure 30 can be configured
for a gain range of 2 to 1000 with a typical nonlinearity of
0.01% at a gain of 10.
Figure 30. Wide Bandwidth Instrumentation Amplifier
OUT LINE DIME NSIONS
Dimensions shown in inches and (mm).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD644J | CAP, SIP, 10P, 9 CAP, 100N, 50V |
| AD644K | HARDWARE FOR HLT RESISTOR |
| AD644L | 10 UF 10% 10V TANT ESR=2R CAP SMT (0805) |
| AD644S | Dual High Speed, Implanted BiFET Op Amp |
| AD6458 | GSM 3 V Receiver IF Subsystem(用于數(shù)字通的IF信號(hào)收發(fā)子系統(tǒng)) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD6440BS | 制造商:Analog Devices 功能描述:CHIPSET MUST ORDER THE AD6449-48BB WITH THE AD6440BS - Bulk |
| AD6449-48BB | 制造商:Analog Devices 功能描述:CHIPSET WITH THE AD6640BS - Bulk |
| AD644948XB | 制造商:AD 功能描述:* |
| AD644J | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual High Speed, Implanted BiFET Op Amp |
| AD644JH | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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