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參數(shù)資料
型號(hào)： AD664JNZ-BIP
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 17/23頁(yè)
文件大?。?/td> 0K
描述： IC DAC 12BIT QUAD BIPOLAR 28-DIP
產(chǎn)品培訓(xùn)模塊： Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝： 1
設(shè)置時(shí)間： 8µs
位數(shù)： 12
數(shù)據(jù)接口： 并聯(lián)
轉(zhuǎn)換器數(shù)目： 4
電壓電源： 雙 ±
功率耗散（最大）： 525mW
工作溫度： 0°C ~ 70°C
安裝類型： 通孔
封裝/外殼： 28-DIP（0.600"，15.24mm）
供應(yīng)商設(shè)備封裝： 28-PDIP
包裝： 管件
輸出數(shù)目和類型： 4 電壓，單極；4 電壓，雙極
采樣率（每秒）： 125k
AD664
Model
JN/JP/AD/AJ/SD
KN/KP/BD/BJ/BE/TD/TE
Min
Typ
Max
Min
Typ
Max
Units
DIGITAL INPUTS
VIH
2.0
*
Volts
VIL
0
0.8
*
Volts
Data Inputs
IIH @ VIN = VLL
–10
±1
10
**
*
A
IIL @ VIN = DGND
–10
±1
10
**
*
A
CS
/DS0/DS1/RST/RD/LS
IIH @ VIN = VLL
–10
±1
10
**
*
A
IIL @ VIN = VLL
–10
±1
10
**
*
A
MS
/TR12
IIH @ VIN = VLL
–10
5
10
**
*
A
IIL @ VIN = DGND
–10
–5
0
**
*
A
QS0
/QSl/QS2 l2
IIH @ VIN = VLL
–10
5
10
**
*
A
IIL @ VIN = DGND
–10
±1
10
**
*
A
DIGITAL OUTPUTS
VOL @ 1.6 mA Sink
0.4
*
Volts
VOH @ 0.5 mA Source
2.4
*
Volts
TEMPERATURE RANGE
JN/JP/KN/KP
0
+70
**
°C
AD/AJ/BD/BJ/BE
– 40
+85
**
°C
SD/TD/TE
–55
+125
**
°C
NOTES
1A minimum power supply of
±12.0 V is required for 0 V to +10 V and ±10 V operation. A minimum power supply of ±11.4 V is required for –5 V to +5 V operation.
2For V
CC < +12 V and VEE > –12 V. Voltage not to exeeed 10 V maximum.
3Bipolar zero error is the difference from the ideal output (0 volts) and the actual output voltage with code 100 000 000 000 applied to the inputs.
4Linearity error is defined as the maximum deviation of the actual DAC output from the ideal output (a straight line drawn from 0 to F.S. – 1 LSB).
5FSR means Full-Scale Range and is 20 V for
±10 V range and 10 V for ± 5 V range.
6A minimum power supply of
±12.0 V is required for a 10 V reference voltage.
7Analog Ground Current is input code dependent.
8Gain error matching is the largest difference in gain error between any two DACs in one package.
9Offset error matching is the largest difference in offset error between any two DACs in one package.
10Bipolar zero error matching is the largest difference in bipolar zero error between any two DACs in one package.
11Linearity error matching is the difference in the worst ease linearity error between any two DACs in one package.
1244-pin versions only.
*Specifications same as JN/JP/AD/AJ/SD.
Specifications subject to change without notice.
Specifications shown in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. All min
and max specifications are guaranteed, although only those shown in boldface are tested on all production units.
ABSOLUTE MAXIMUM RATINGS*
VLL to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to +7 V
VCC to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to +18 V
VEE to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . –18 V to 0 V
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +300
°C, 10 sec
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . 1000 mW
AGND to DGND . . . . . . . . . . . . . . . . . . . . . . . . –1 V to +1 V
Reference Input . . . . . . . . . . . . . . . . . . VREF
≤ ±10 V and V
REF
≤ (V
CC – 2 V, VEE + 2 V)
VCC to VEE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to +36 V
CAUTION
ESD (electrostatic discharge) sensitive device. Unused devices must be stored in conductive foam
or shunts. The protective foam should be discharged to the destination socket before devices are
removed.
WARNING!
ESD SENSITIVE DEVICE
Digital Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
Analog Outputs . . . . . . . . . . . . . . . . . . . . . Indefinite Shorts to
VCC, VLL, VEE and GND
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
REV.
–3–
D
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