Logic Levels (TTL, Compa" />
參數(shù)資料
型號: AD667JPZ-REEL
廠商: Analog Devices Inc
文件頁數(shù): 3/8頁
文件大?。?/td> 0K
描述: IC DAC 12BIT W/BUFF LATCH 28PLCC
標(biāo)準(zhǔn)包裝: 750
設(shè)置時間: 3µs
位數(shù): 12
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 雙 ±
功率耗散(最大): 1W
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 28-LCC(J 形引線)
供應(yīng)商設(shè)備封裝: 28-PLCC(11.51x11.51)
包裝: 帶卷 (TR)
輸出數(shù)目和類型: *
采樣率(每秒): 500k
AD667
Model
AD667A
AD667B
AD667S
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Units
DIGITAL INPUTS
Resolution
12
Bits
Logic Levels (TTL, Compatible, TMIN–TMAX)
1
VIH (Logic “l(fā)’’)
+2.0
+5.5
+2.0
+5.5
+2.0
+5.5
V
VIL (Logic “0”)
0
+0.8
0
+0.8
0
+0.7
V
IIH (VIH = 5.5 V)
3
10
3
10
3
10
A
IIL (VIL = 0.8 V)
1
5
1
5
1
5
A
TRANSFER CHARACTERISTICS
ACCURACY
Linearity Error @ +25
°C
+1/4
1/2
± 1/8
1/4
± 1/8
1/2
LSB
TA = TMIN to TMAX
± 1/2
3/4
± 1/4
1/2
± 1/8
3/4
LSB
Differential Linearity Error @ +25
°C
± 1/2
3/4
± 1/4
1/2
± 1/4
3/4
LSB
TA = TMIN to TMAX
Monotonicity Guaranteed
LSB
Gain Error
2
± 0.1
0.2
± 0.1
0.2
± 0.1
0.2
% FSR
3
Unipolar Offset Error
2
± 1
2
± 1
2
± 1
2
LSB
Bipolar Zero
2
± 0.05
0.1
± 0.05
0.1
± 0.05
0.1
% of FSR
DRIFT
Differential Linearity
± 2
ppm of FSR/
°C
Gain (Full Scale) TA = 25
°C to T
MIN or TMAX
± 5
± 30
± 5
± 15
30
ppm of FSR/
°C
Unipolar Offset TA = 25
°C to T
MIN or TMAX
± 1
± 3
3
ppm of FSR/
°C
Bipolar Zero TA = 25
°C to T
MIN or TMAX
± 5
± 10
10
ppm of FSR/
°C
CONVERSION SPEED
Settling Time to
±0.01% of FSR for
FSR Change (2 k
500 pF Load)
with 10 k
Feedback
3
4
3
4
3
4
s
with 5 k
Feedback
2
3
2
3
2
3
s
For LSB Change
1
s
Slew Rate
10
V/
s
ANALOG OUTPUT
Ranges
4
± 2.5, ±5, ±10,
± 2.5, ± 5, ±10,
V
+5, +10
Output Current
± 5
± 5mA
Output Impedance (DC)
0.05
Short Circuit Current
40
mA
REFERENCE OUTPUT
9.90
10.00
10.10
9.90
10.00
10.10
9.90
10.00
10.10
V
External Current
0.1
1.0
0.1
1.0
mA
POWER SUPPLY SENSITIVITY
VCC = +11.4 V to +16.5 V dc
5
10
5
10
5
10
ppm of FS/%
VEE = –11.4 V to –16.5 V dc
5
10
5
10
5
10
ppm of FS/%
POWER SUPPLY REQUIREMENTS
Rated Voltages
± 12, ± 15
V
Range
4
11.4
16.5
11.4
16.5
11.4
16.5
V
Supply Current
+11.4 V to +16.5 V dc
8
12
8
12
8
12
mA
–11.4 V to –16.5 V dc
20
25
20
25
20
25
mA
TEMPERATURE RANGE
Specification
–25
+85
–25
+85
–55
+125
°C
Storage
–65
+150
–65
+150
–65
+150
°C
TIMING DIAGRAMS
WRITE CYCLE #1
(Load First Rank from Data Bus; A3 = 1)
WRITE CYCLE #2
(Load Second Rank from First Rank; A2, A1, A0 = 1)
REV. A
–3–
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