參數(shù)資料
型號(hào): AD712JR
廠商: Analog Devices Inc
文件頁(yè)數(shù): 7/20頁(yè)
文件大?。?/td> 0K
描述: IC OPAMP BIFET DUAL PREC 8SOIC
標(biāo)準(zhǔn)包裝: 98
放大器類(lèi)型: J-FET
電路數(shù): 2
轉(zhuǎn)換速率: 20 V/µs
-3db帶寬: 4MHz
電流 - 輸入偏壓: 25pA
電壓 - 輸入偏移: 300µV
電流 - 電源: 5mA
電流 - 輸出 / 通道: 25mA
電壓 - 電源,單路/雙路(±): 9 V ~ 36 V,±4.5 V ~ 20 V
工作溫度: 0°C ~ 70°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SO
包裝: 管件
AD712
Rev. H | Page 15 of 20
Figure 41 and Figure 42 show the settling time characteristics of
the AD712 when used as a DAC output buffer for the AD7545.
1mV
5V
500ns
100
10
0%
90
00
82
3-
04
1
Figure 41. Positive Settling Characteristics for AD712 with AD7545
1mV
5V
500ns
100
10
0%
90
00
82
3-
04
2
Figure 42. Negative Settling Characteristics for AD712 with AD7545
NOISE CHARACTERISTICS
The random nature of noise, particularly in the flicker noise
region, makes it difficult to specify in practical terms. At the
same time, designers of precision instrumentation require
certain guaranteed maximum noise levels to realize the full
accuracy of their equipment. All grades of the AD712 are sample
tested on an AQL basis to a limit of 6 μV p-p, 0.1 Hz to 10 Hz.
DRIVING THE ANALOG INPUT OF AN ADC
An op amp driving the analog input of an ADC, such as that
shown in Figure 43, must be capable of maintaining a constant
output voltage under dynamically changing load conditions. In
successive approximation converters, the input current is compared
to a series of switched trial currents. The comparison point is
diode clamped, but can deviate several hundred millivolts resulting
in high frequency modulation of analog-to-digital input current.
The output impedance of a feedback amplifier is made artificially
low by the loop gain. At high frequencies, where the loop gain is
low, the amplifier output impedance can approach its open-loop
value. Most IC amplifiers exhibit a minimum open-loop output
impedance of 25 Ω due to current-limiting resistors.
+15V
1/2
AD712
0.1F
–15V
ANALOG COM
AD574A
12/8
CS
AO
R/C
CE
REF IN
REF OUT
BIP OFF
10VIN
20VIN
STS
+5V
+15V
–15V
±10V
ANALOG
INPUT
OFFSET
ADJUST
R2
100
R1
100
GAIN
ADJUST
HIGH
BITS
MIDDLE
BITS
LOW
BITS
AC
DC
+
0
082
3-
0
43
Figure 43. AD712 as an ADC Unity-Gain Buffer
A few hundred microamps reflected from the change in converter
loading can introduce errors in instantaneous input voltage. If
the analog-to-digital conversion speed is not excessive and the
bandwidth of the amplifier is sufficient, the amplifier output
returns to the nominal value before the converter makes its
comparison. However, many amplifiers have relatively narrow
bandwidth yielding slow recovery from output transients. The
AD712 is ideally suited to drive high speed ADCs because it
offers both wide bandwidth and high open-loop gain.
200ns
500mV
PD711 BUFF
–10V ADC IN
1mV
100
10
0%
90
00
82
3-
0
44
Figure 44. ADC Input Unity Gain Buffer Recovery Times, 10 V ADC IN
200ns
500mV
PD711 BUFF
–5V ADC IN
1mV
100
10
0%
90
00
82
3-
0
45
Figure 45. ADC Input Unity Gain Buffer Recovery Times, 5 V ADC IN
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