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參數(shù)資料
| 型號： | AD713AQ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 3/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC OPAMP BIFET QUAD PREC 14CDIP |
| 標準包裝： | 25 |
| 放大器類型： | J-FET |
| 電路數(shù)： | 4 |
| 轉換速率： | 20 V/µs |
| -3db帶寬： | 4MHz |
| 電流 - 輸入偏壓： | 55pA |
| 電壓 - 輸入偏移： | 300µV |
| 電流 - 電源： | 10mA |
| 電流 - 輸出 / 通道： | 25mA |
| 電壓 - 電源，單路/雙路(±)： | 9 V ~ 36 V，±4.5 V ~ 18 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 14-CDIP（0.300"，7.62mm） |
| 供應商設備封裝： | 14-CERDIP |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 766 (CN2011-ZH PDF) |
AD713
Rev. F | Page 11 of 20
THEORY OF OPERATION
MEASURING AD713 SETTLING TIME
The error signal is thus clamped twice: once to prevent overload-
ing amplifier A2 and then a second time to avoid overloading
the oscilloscope preamp. A Tektronix oscilloscope preamp
Type 7A26 was carefully chosen because it recovers from the
approximately 0.4 V overload quickly enough to allow accurate
measurement of the AD713 1 μs settling time. Amplifier A2 is a
very high speed FET input op amp; it provides a voltage gain of
10, amplifying the error signal output of the AD713 under test
(providing an overall gain of 5).
while operating in the settling time test circuit of Figure 29.
The input of the settling time fixture is driven by a flat-top pulse
generator. The error signal output from the false summing node
of A1, the AD713 under test, is clamped, amplified by Op Amp
A2, and then clamped again.
00824-
029
10k
200
4.99k
10k
4.99k
5pF TO 18pF
+VS
–VS
VIN
+
10pF
0.1F
1F
5k
1/4
AD713
A1
4
11
+
A2
5pF
+
0.2pF TO 0.8pF
10k
206
2 ×
HP2835
2 ×
HP2835
1.1k
+VS
–VS
0.47F
VERROR × 5
*
FLAT-TOP
PULSE
GENERATOR
DATA
DYNAMICS
5109
OR
EQUIVALENT
*USE VERY
SHORT CABLE
OR TERMINATION
RESISTOR
NOTES
1. USE CIRCUIT BOARD
WITH GROUND PLANE.
TO TEKTRONIX 7A26
OSCILLOSCOPE
PREAMP INPUT
SECTION (VIA LESS
THAN 1FT 50
COAXIAL CABLE)
20pF
1M
008
24-
0
31
100
90
10
0%
5mV
5V
500ns
Figure 31. Settling Characteristics to –10 V Step,
Upper Trace: Output of AD713 Under Test (5 V/div),
Lower Trace: Amplified Error Voltage (0.01%/div)
POWER SUPPLY BYPASSING
The power supply connections to the AD713 must maintain a
low impedance to ground over a bandwidth of 4 MHz or more.
This is especially important when driving a significant resistive
or capacitive load because all current delivered to the load
comes from the power supplies. Multiple high quality bypass
capacitors are recommended for each power supply line in any
critical application. As shown in Figure 32, a 0.1 μF ceramic and
a 1 μF electrolytic capacitor placed as close as possible to the
amplifier (with short lead lengths to power supply common)
assures adequate high frequency bypassing in most applications.
A minimum bypass capacitance of 0.1 μF should be used for
any application.
Figure 29. Settling Time Test Circuit
008
24-
0
30
100
90
10
0%
5mV
5V
500ns
008
24-
032
+VS
–VS
1/4
AD713
4
11
+
1F
0.1F
+
1F
0.1F
Figure 32. Recommended Power Supply Bypassing
Figure 30. Settling Characteristics 0 V to 10 V Step,
Upper Trace: Output of AD713 Under Test (5 V/div),
Lower Trace: Amplified Error Voltage (0.01%/div)
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD713BQ | 制造商:Analog Devices 功能描述:IC OP-AMP QUAD BIFET |
| AD713JCHIPS | 制造商:AD 制造商全稱:Analog Devices 功能描述:Quad Precision, Low Cost, High Speed, BiFET Op Amp |
| AD713JN | 制造商:Analog Devices 功能描述:OP Amp Quad GP 制造商:Rochester Electronics LLC 功能描述:HIGH SPEED QUAD BIFET AMP - Bulk 制造商:Analog Devices 功能描述:IC OP AMP QUAD BIFET DIP14 713 |
| AD713JNZ | 功能描述:IC OPAMP BIFET QUAD PREC 14DIP RoHS:是 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標準包裝:2,500 系列:- 放大器類型:通用 電路數(shù):4 輸出類型:- 轉換速率:0.6 V/µs 增益帶寬積:1MHz -3db帶寬:- 電流 - 輸入偏壓:45nA 電壓 - 輸入偏移:2000µV 電流 - 電源:1.4mA 電流 - 輸出 / 通道:40mA 電壓 - 電源，單路/雙路(±):3 V ~ 32 V，±1.5 V ~ 16 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:14-TSSOP 包裝:帶卷 (TR) 其它名稱:LM324ADTBR2G-NDLM324ADTBR2GOSTR |
| AD713JR | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Voltage-Feedback Operational Amplifier |
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