參數(shù)資料
型號: AD7147WPACPZ-1RL
廠商: Analog Devices Inc
文件頁數(shù): 44/73頁
文件大?。?/td> 0K
描述: IC CAP-TO-DGTL CONV PROG 24LFCSP
標準包裝: 5,000
系列: CapTouch™
類型: 電容數(shù)字轉換器
分辨率(位): 16 b
采樣率(每秒): 250k
數(shù)據(jù)接口: I²C,串行
電壓電源: 單電源
電源電壓: 2.6 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-VFQFN 裸露焊盤,CSP
供應商設備封裝: 24-LFCSP-VQ(4x4)
包裝: 帶卷 (TR)
AD7147
Data Sheet
Rev. D | Page 48 of 72
Table 27. STAGE_COMPLETE_INT_ENABLE Register
Address
Data Bit
Default
Value
Type
Name
Description
0x007
[0]
0
R/W
STAGE0_COMPLETE_INT_ENABLE
STAGE0 conversion interrupt control
0 = interrupt source disabled
1 = INT asserted at completion of STAGE0 conversion
[1]
0
R/W
STAGE1_COMPLETE_INT_ENABLE
STAGE1 conversion interrupt control
0 = interrupt source disabled
1 = INT asserted at completion of STAGE1 conversion
[2]
0
R/W
STAGE2_COMPLETE_INT_ENABLE
STAGE2 conversion interrupt control
0 = interrupt source disabled
1 = INT asserted at completion of STAGE2 conversion
[3]
0
R/W
STAGE3_COMPLETE_INT_ENABLE
STAGE3 conversion interrupt control
0 = interrupt source disabled
1 = INT asserted at completion of STAGE3 conversion
[4]
0
R/W
STAGE4_COMPLETE_INT_ENABLE
STAGE4 conversion interrupt control
0 = interrupt source disabled
1 = INT asserted at completion of STAGE4 conversion
[5]
0
R/W
STAGE5_COMPLETE_INT_ENABLE
STAGE5 conversion interrupt control
0 = interrupt source disabled
1 = INT asserted at completion of STAGE5 conversion
[6]
0
R/W
STAGE6_COMPLETE_INT_ENABLE
STAGE6 conversion interrupt control
0 = interrupt source disabled
1 = INT asserted at completion of STAGE6 conversion
[7]
0
R/W
STAGE7_COMPLETE_INT_ENABLE
STAGE7 conversion interrupt control
0 = interrupt source disabled
1 = INT asserted at completion of STAGE7 conversion
[8]
0
R/W
STAGE8_COMPLETE_INT_ENABLE
STAGE8 conversion complete interrupt control
0 = interrupt source disabled
1 = INT asserted at completion of STAGE8 conversion
[9]
0
R/W
STAGE9_COMPLETE_INT_ENABLE
STAGE9 conversion interrupt control
0 = interrupt source disabled
1 = INT asserted at completion of STAGE9 conversion
[10]
0
R/W
STAGE10_COMPLETE_INT_ENABLE
STAGE10 conversion interrupt control
0 = interrupt source disabled
1 = INT asserted at completion of STAGE10 conversion
[11]
0
R/W
STAGE11_COMPLETE_INT_ENABLE
STAGE11 conversion interrupt control
0 = interrupt source disabled
1 = INT asserted at completion of STAGE11 conversion
[12]
0
R/W
GPIO_INT_ENABLE
Interrupt control when GPIO input pin changes level
0 = disabled
1 = enabled
[15:13]
Unused
Set to 0
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