參數(shù)資料
型號(hào): AD7193BCPZ-RL
廠商: Analog Devices Inc
文件頁數(shù): 8/57頁
文件大?。?/td> 0K
描述: IC ADC 24BIT SPI 4.8KHZ 32LFCSP
標(biāo)準(zhǔn)包裝: 5,000
位數(shù): 24
采樣率(每秒): 4.8k
數(shù)據(jù)接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 32-WFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 32-LFCSP-WQ(5x5)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 4 個(gè)差分,單極;4 個(gè)差分,雙極;8 個(gè)偽差分,單極;8 個(gè)偽差分,雙極
Data Sheet
AD7193
Rev. D | Page 15 of 56
TYPICAL PERFORMANCE CHARACTERISTICS
08367-
006
0
200
400
600
800
1000
SAMPLE
CO
DE
8,387,468
8,387,470
8,387,472
8,387,474
8,387,476
8,387,478
8,387,480
8,387,482
8,387,484
8,387,486
Figure 7. Noise (VREF = AVDD = 5 V, Output Data Rate = 4.7 Hz,
Gain = 128, Chop Disabled, Sinc4 Filter)
08367-
007
0
50
100
150
200
8,387,470
8,387,472
8,387,474
8,387,476
8,387,478
8,387,480
8,387,482
8,387,484
CODE
O
CCURRE
NCE
Figure 8. Noise Distribution Histogram (VREF = AVDD = 5 V,
Output Data Rate = 4.7 Hz, Gain = 128, Chop Disabled, Sinc4 Filter)
08367-
008
8,388,830
8,388,840
8,388,850
8,388,860
8,388,870
8,388,880
8,388,890
8,388,900
8,388,910
8,388,920
0
200
400
600
800
1000
SAMPLE
CO
DE
Figure 9. Noise (VREF = AVDD = 5 V, Output Data Rate = 2400 Hz,
Gain = 1, Chop Disabled, Sinc4 Filter)
08367-
009
0
10
20
30
40
50
8,388,830
8,388,860
8,388,890
8,388,920
CODE
O
CCURRE
NCE
Figure 10. Noise Distribution Histogram (VREF = AVDD = 5 V,
Output Data Rate = 2400 Hz, Gain = 1, Chop Disabled, Sinc4 Filter)
08367-
010
8,388,864
8,388,866
8,388,868
8,388,870
8,388,872
8,388,874
8,388,876
8,388,878
8,388,880
0
200
400
600
800
1000
SAMPLE
CO
DE
Figure 11. Noise (VREF = AVDD = 5 V, Output Data Rate = 42.1 Hz (FS[9:0] = 6,
Average by 16), Gain = 1, Chop Disabled, Sinc4 Filter)
08367-
011
0
50
100
150
200
8,388,864
8,388,868
8,388,872
8,388,876
8,388,880
CODE
O
CCURRE
NCE
Figure 12. Noise Distribution Histogram (VREF = AVDD = 5 V, Output Data Rate =
42.1 Hz (FS[9:0] = 6, Average by 16), Gain = 1, Chop Disabled, Sinc4 Filter)
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