參數(shù)資料
型號(hào)： AD7225KPZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 1/24頁(yè)
文件大?。?/td> 0K
描述： IC DAC 8BIT QUAD W/AMP 28-PLCC
產(chǎn)品培訓(xùn)模塊： Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝： 1
設(shè)置時(shí)間： 4µs
位數(shù)： 8
轉(zhuǎn)換器數(shù)目： 4
電壓電源： 雙 ±
功率耗散（最大）： 500mW
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 28-LCC（J 形引線）
供應(yīng)商設(shè)備封裝： 28-PLCC（11.51x11.51）
包裝： 管件
輸出數(shù)目和類型： 4 電壓，單極；4 電壓，雙極
采樣率（每秒）： 200k
LC2MOS Quad 8-Bit DAC
with Separate Reference Inputs
AD7225
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
2010 Analog Devices, Inc. All rights reserved.
FEATURES
Four 8-bit DACs with output amplifiers
Separate reference input for each DAC
Microprocessor compatible with double-buffered inputs
Simultaneous update of all 4 outputs
Operates with single or dual supplies
Extended temperature range operation
No user trims required
Skinny 24-lead PDIP, CERDIP, SOIC, and SSOP packages
28-lead PLCC package
FUNCTIONAL BLOCK DIAGRAM
VREFA VREFB VREFC VREFD
VDD
LDAC
VSS
AGND DGND
INPUT
LATCH A
DAC
LATCH A
VOUTA
DAC A
A
INPUT
LATCH B
DAC
LATCH B
VOUTB
DAC B
B
INPUT
LATCH C
DAC
LATCH C
VOUTC
DAC C
C
INPUT
LATCH D
CONTROL
LOGIC
DAC
LATCH D
VOUTD
DAC D
D
DAT
A
BUS
DB7
DATA
(8-BIT)
DB0
WR
A1
A2
AD7225
00
986-
001
Figure 1.
GENERAL DESCRIPTION
The AD7225 contains four 8-bit voltage output digital-to-
analog converters, with output buffer amplifiers and interface
logic on a single monolithic chip. Each DAC has a separate
reference input terminal. No external trims are required to
achieve full specified performance for the part.
The double-buffered interface logic consists of two 8-bit
registers per channel—an input register and a DAC register.
Control Input A0 and Control Input A1 determine which input
register is loaded when WR goes low. Only the data held in the
DAC registers determines the analog outputs of the converters.
The double-buffering allows simultaneous update of all four
outputs under control of LDAC. All logic inputs are TTL and
CMOS (5 V) level compatible, and the control logic is speed
compatible with most 8-bit microprocessors.
Specified performance is guaranteed for input reference
voltages from 2 V to 12.5 V when using dual supplies. The part
is also specified for single-supply operation using a reference of
10 V. Each output buffer amplifier is capable of developing 10 V
across a 2 kΩ load.
The AD7225 is fabricated on an all ion-implanted, high speed,
linear-compatible CMOS (LC2MOS) process, which is
specifically developed to integrate high speed digital logic
circuits and precision analog circuitry on the same chip.
PRODUCT HIGHLIGHTS
1.
DACs and Amplifiers on CMOS Chip.
The single-chip design of four 8-bit DACs and amplifiers
allows a dramatic reduction in board space requirements
and offers increased reliability in systems using multiple
converters. Its pinout is aimed at optimizing board layout
with all analog inputs and outputs at one end of the
package and all digital inputs at the other.
2.
Single- or Dual-Supply Operation.
The voltage-mode configuration of the AD7225 allows
single-supply operation. The part can also be operated with
dual supplies, giving enhanced performance for some
parameters.
3.
Versatile Interface Logic.
The AD7225 has a common 8-bit data bus with individual
DAC latches, providing a versatile control architecture for
simple interface to microprocessors. The double-buffered
interface allows simultaneous update of the four outputs.
4.
Separate Reference Input for Each DAC.
The AD7225 offers great flexibility in dealing with input
signals, with a separate reference input provided for each
DAC and each reference having variable input voltage
capability.
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