參數(shù)資料
型號: AD7225KRZ
廠商: Analog Devices Inc
文件頁數(shù): 10/24頁
文件大?。?/td> 0K
描述: IC DAC 8BIT QUAD W/AMP 24SOIC
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 31
設(shè)置時間: 4µs
位數(shù): 8
轉(zhuǎn)換器數(shù)目: 4
電壓電源: 雙 ±
功率耗散(最大): 500mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 24-SOIC W
包裝: 管件
輸出數(shù)目和類型: 4 電壓,單極;4 電壓,雙極
采樣率(每秒): 200k
AD7225
Rev. C | Page 18 of 24
less, there exists a good correlation with the actual performance
of the transversal filter (see Figure 23).
DIGITAL WORD MULTIPLICATION
Because each DAC of the AD7225 has a separate reference input,
the output of one DAC can be used as the reference input for
another. This means that multiplication of digital words can be
performed (with the result given in analog form). For example,
if the output from DAC A is applied to VREFB, then the output
from DAC B, VOUTB, can be expressed as:
VOUTB = DA × DB × VREFA
where DA and DB are the fractional representations of the digital
words in DAC Latch A and DAC Latch B, respectively.
If DA = DB = D, the result is D2 × VREFA.
In this manner, the four DACs can be used on their own or in
conjunction with an external summing amplifier to generate
complex waveforms. Figure 24 shows one such application.
In this case, the output waveform, Y, is represented by
Y = (x4 + 2x3 + 3x2 + 2x + 4) × VIN
where x is the digital code that is applied to all four DAC
latches.
*DIGITAL INPUTS OMITTED FOR CLARITY.
100k
Y
VOUTA
VREFA
VOUTB
VREFB
VOUTC
VREFC
VOUTD
VREFD
VSS
AGND DGND
15V
VDD
AD7225*
VIN
100k
50k
33k
50k
25k
00986-
024
Figure 24. Complex Waveform Generation
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