參數(shù)資料
型號: AD7226KN
廠商: Analog Devices Inc
文件頁數(shù): 7/16頁
文件大小: 0K
描述: IC DAC 8BIT LC2MOS QUAD 20-DIP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標準包裝: 18
設(shè)置時間: 4µs
位數(shù): 8
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 4
電壓電源: 雙 ±
工作溫度: -40°C ~ 85°C
安裝類型: 通孔
封裝/外殼: 20-DIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 20-PDIP
包裝: 管件
輸出數(shù)目和類型: 4 電壓,單極;4 電壓,雙極
采樣率(每秒): 143k
AD7226
Rev. D | Page
COMPLIANT TO JEDEC STANDARDS MO-047-AA
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
0.020 (0.50)
R
BOTTOM
VIEW
(PINS UP)
0.021 (0.53)
0.013 (0.33)
0.330 (8.38)
0.290 (7.37)
0.032 (0.81)
0.026 (0.66)
0.056 (1.42)
0.042 (1.07)
0.20 (0.51)
MIN
0.120 (3.04)
0.090 (2.29)
3
4
19
18
8
9
14
13
TOP VIEW
(PINS DOWN)
0.395 (10.03)
0.385 (9.78)
SQ
0.356 (9.04)
0.350 (8.89)
SQ
0.048 (1.22 )
0.042 (1.07)
0.048 (1.22)
0.042 (1.07)
0.020
(0.51)
R
0.050
(1.27)
BSC
0.180 (4.57)
0.165 (4.19)
0.045 (1.14)
0.025 (0.64)
R
PIN 1
IDENTIFIER
Figure 5. 20-Lead Plastic Leaded Chip Carrier [PLCC]
(P-20
A)
Dimensions shown in inches and (millimeters)
ORDERING GUIDE
Model1
Temperature Range
Total Unadjusted Error2
Package Description
Package Option3
AD7226BQ
40°C to +85°C
±1 LSB
20 Lead CERDIP
Q-20
AD7226BRSZ
40°C to +85°C
±1 LSB
20 Lead SSOP
RS-20
AD7226KN
40°C to +85°C
±1 LSB
20 Lead PDIP
N-20
AD7226KNZ
40°C to +85°C
±1 LSB
20 Lead PDIP
N-20
AD7226KP
40°C to +85°C
±1 LSB
20 Lead PLCC
P-20A
AD7226KP-REEL
40°C to +85°C
±1 LSB
20 Lead PLCC
P-20A
AD7226KPZ
40°C to +85°C
±1 LSB
20 Lead PLCC
P-20A
AD7226KPZ-REEL
40°C to +85°C
±1 LSB
20 Lead PLCC
P-20A
AD7226KR
40°C to +85°C
±1 LSB
20 Lead SOIC - Wide
RW-20
AD7226KR-REEL
40°C to +85°C
±1 LSB
20 Lead SOIC - Wide
RW-20
AD7226KRZ
40°C to +85°C
±1 LSB
20 Lead SOIC - Wide
RW-20
AD7226KRZ-REEL
40°C to +85°C
±1 LSB
20 Lead SOIC - Wide
RW-20
AD7226BCHIPS
40°C to +85°C
±1 LSB
Chips or Die
1 Z = ROHS Compliant Part.
2 Dual supply operation.
3 N = plastic DIP; P = plastic leaded chip carrier; Q = CERDIP; RW = SPIC; RS = SSOP.
REVISION HISTORY
1/11—Rev. C to Rev. D
Changes to Ordering Guide...........................................................15
3/03—Rev. B to Rev. C
Title Revision .....................................................................................1
3/03—Rev. A to Rev. B
Edits to Features ................................................................................1
Edits to Specifications.......................................................................2
Edits to Ordering Guide...................................................................3
Edits to Absolute Maximum Ratings..............................................3
Edits to Pin Configurations .............................................................4
Edits to Specifications Ranges .........................................................8
Outline Dimensions Updated........................................................13
RS-20 Package Added.....................................................................13
Updated RS-20 Package Outline Dimensions.............................13
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