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參數(shù)資料
| 型號： | AD7226KP |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 2/16頁 |
| 文件大小： | 0K |
| 描述： | IC DAC 8BIT LC2MOS QUAD 20-PLCC |
| 產(chǎn)品培訓模塊： | Data Converter Fundamentals DAC Architectures |
| 標準包裝： | 1 |
| 設置時間： | 4µs |
| 位數(shù)： | 8 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉換器數(shù)目： | 4 |
| 電壓電源： | 雙 ± |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-LCC（J 形引線） |
| 供應商設備封裝： | 20-PLCC（9x9） |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 4 電壓，單極；4 電壓，雙極 |
| 采樣率（每秒）： | 143k |
REV.
–10–
AD7226
DAC A
VREF
VDD
DGND
AGND
VSS
VOUTA
AD7226*
*DIGITAL INPUTS OMITTED FOR CLARITY
5
VBIAS
Figure 10. AGND Bias Circuit
For a given VIN, increasing AGND above system GND will
reduce the effective VDD–VREF which must be at least 4 V to
ensure specified operation. Note that because the AGND pin is
common to all four DACs, this method biases up the output
voltages of all the DACs in the AD7226. Note that VDD and VSS
of the AD7226 should be referenced to DGND.
3-PHASE SINE WAVE
The circuit of Figure 11 shows an application of the AD7226 in
the generation of 3-phase sine waves which can be used to con-
trol small 3-phase motors. The proper codes for synthesizing a
full sine wave are stored in EPROM, with the required phase-
shift of 120
∞ between the three D/A converter outputs being
generated in software.
Data is loaded into the three D/A converters from the sine
EPROM via the microprocessor or control logic. Three loops are
generated in software with each D/A converter being loaded
from a separate loop. The loops run through the look-up table
producing successive triads of sinusoidal values with 120
∞
separation which are loaded to the D/A converters producing
three sine wave voltages 120
∞ apart. A complete sine wave
cycle is generated by stepping through the full look-up table.
If a 256-element sine wave table is used then the resolution of
the circuit will be 1.4
∞ (360∞/256). Figure 13 shows typical
resulting waveforms. The sine waves can be smoothed by filter-
ing the D/A converter outputs.
The fourth D/A converter of the AD7226, DAC D, may be
used in a feedback configuration to provide a programmable
reference voltage for itself and the other three converters. This
configuration is shown in Figure 11. The relationship of VREF to
VIN is dependent upon digital code and upon the ratio of RF to
R and is given by the formula.
V
G
GD
V
REF
D
IN
=
+
()
+
()
1
(6)
where G = RF/R
and DD is a fractional representation of the digital word in latch D.
Alternatively, for a given VIN and resistance ratio, the required
value of DD for a given value of VREF can be determined from
the expression
DR R
V
R
DF
IN
REF
F
=+
()
1
/–
(7)
Figure 12 shows typical plots of VREF versus digital code for
three different values of RF. With VIN = 2.5 V and RF = 3 R the
peak-to-peak sine wave voltage from the converter outputs will
vary between 2.5 V and 10 V over the digital input code range
of 0 to 255.
DIGITAL CODE (Decimal Equivalent)
4.0 V IN
0
16
V
REF
32 48 64 80 96 112 128 144 160 176 192 208 224 240 256
3.5 V IN
3.0 V IN
2.5 V IN
2.0 V IN
1.5 V IN
VIN
RF = 3R
RF = 2R
RF = R
VDD = +15 V
VSS = –5 V
Figure 12. Variation of VREF with Feedback Configuration
VREF
VOUTA
WR
A1
A0
VOUTB
VOUTC
VOUTD
AD7226
DATA
BUS
ADDRESS
BUS
MICROPROCESSOR
OR
CONTROL LOGIC
SINE
EPROM
ADDRESS
DECODE
VIN
RF
R
Figure 11. 3-Phase Sine Wave Generation Circuit
VOUTA
VOUTB
VOUTC
Figure 13. 3-Phase Sine Wave Output
D
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參數(shù)描述 |
|---|---|
| AD7226KP-REEL | 制造商:Analog Devices 功能描述:DAC 4-CH R-2R 8-bit 20-Pin PLCC T/R 制造商:Analog Devices 功能描述:DAC 4-CH R-2R 8BIT 20PLCC - Tape and Reel |
| AD7226KPZ | 功能描述:IC DAC 8BIT LC2MOS QUAD 20-PLCC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉換器 系列:- 標準包裝:1 系列:- 設置時間:4.5µs 位數(shù):12 數(shù)據(jù)接口:串行，SPI? 轉換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:8-SOICN 包裝:剪切帶 (CT) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:* 其它名稱:MCP4921T-E/SNCTMCP4921T-E/SNRCTMCP4921T-E/SNRCT-ND |
| AD7226KPZ | 制造商:Analog Devices 功能描述:IC 8-BIT DAC |
| AD7226KPZ-REEL | 功能描述:IC DAC 8BIT QUAD W/AMP 20PLCC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉換器 系列:- 產(chǎn)品培訓模塊:Data Converter Fundamentals DAC Architectures 標準包裝:750 系列:- 設置時間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應商設備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
| AD7226KR | 功能描述:IC DAC 8BIT LC2MOS QUAD 20-SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉換器 系列:- 產(chǎn)品培訓模塊:Data Converter Fundamentals DAC Architectures 標準包裝:750 系列:- 設置時間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應商設備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
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