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參數(shù)資料
| 型號： | AD7226KR-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 3/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 8BIT QUAD W/AMP 20-SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 設(shè)置時(shí)間： | 4µs |
| 位數(shù)： | 8 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 4 |
| 電壓電源： | 雙 ± |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-SOIC W |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 4 電壓，單極；4 電壓，雙極 |
| 采樣率（每秒）： | 143k |
REV.
AD7226
–11–
STAIRCASE WINDOW COMPARATOR
In many test systems, it is important to be able to determine
whether some parameter lies within defined limits. The staircase
window comparator of Figure 14a is a circuit that can be used,
for example, to measure the VOH and VOL thresholds of a TTL
device under test. Upper and lower limits on both VOH and VOL
can be programmably set using the AD7226. Each adjacent pair
of comparators forms a window of programmable size. If VTEST
lies within a window, then the output for that window will be
high. With a reference of 2.56 V applied to the VREF input, the
minimum window size is 10 mV.
VREF
VDD
AGND
VOUTA
VOUTB
VOUTC
VOUTD
VOH (HIGH)
VOL (HIGH)
VOH (LOW)
VOL (LOW)
VTEST
FROM D.U.T.
1/4 CA339
10k
5V
10k
5V
10k
5V
10k
WINDOW 5
WINDOW 4
WINDOW 3
WINDOW 2
WINDOW 1
AD7226
Figure 14a. Logic Level Measurement
VREF
AGND
VOUTA
VOUTB
VOUTC
VOUTD
WINDOW 5
WINDOW 4
WINDOW 3
WINDOW 2
WINDOW 1
Figure 14b. Window Structure
The circuit can easily be adapted to allow for overlapping of
windows as shown in Figure 15a. If the three outputs from this
circuit are decoded then five different nonoverlapping program-
mable windows can again be defined.
VREF
VDD
AGND
5V
10k
WINDOW 3
VOUTA
VOUTB
VOUTC
VOUTD
VTEST
FROM D.U.T.
10k
5V
10k
5V
WINDOW 2
WINDOW 1
AD7226
Figure 15a. Overlapping Windows
VREF
AGND
VOUTA
VOUTB
VOUTC
VOUTD
WINDOW 3
WINDOW 2
WINDOW 1
Figure 15b. Window Structure
DAC A
VREF
VDD
DGND
AGND
VSS
VOUTA
AD7226*
*DIGITAL INPUTS OMITTED
FOR CLARITY
+4V
–4V
+15V
15k
10k
Figure 16. Varying Reference Signal
VARYING REFERENCE SIGNAL
In some applications, it may be desirable to have a varying signal
applied to the reference input of the AD7226. The AD7226 has
multiplying capability within upper and lower limits of reference
voltage when operated with dual supplies. The upper and lower
limits are those required by the AD7226 to achieve its linearity
specification. Figure 16 shows a sine wave signal applied to the
reference input of the AD7226. For input signal frequencies up
to 50 kHz, the output distortion typically remains less than 0.1%.
Typical 3 dB bandwidth figure is 700 kHz.
D
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| AD7226KRS | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AD7226KRZ | 功能描述:IC DAC 8BIT LC2MOS QUAD 20-SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 設(shè)置時(shí)間:4µs 位數(shù):12 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:8-uMAX 包裝:管件 輸出數(shù)目和類型:2 電壓，單極 采樣率（每秒）:* 產(chǎn)品目錄頁面:1398 (CN2011-ZH PDF) |
| AD7226KRZ | 制造商:Analog Devices 功能描述:IC, DAC, 8BIT, 143KSPS, SOIC-20 |
| AD7226KRZ-REEL | 功能描述:IC DAC 8BIT QUAD W/AMP 20SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:750 系列:- 設(shè)置時(shí)間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
| AD7226TD | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Digital-to-Analog Converter |
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