- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄373894 > AD722 (Analog Devices, Inc.) RGB to NTSC/PAL Encoder(RGB與NTSC/PAL制式轉(zhuǎn)換編碼器) PDF資料下載
參數(shù)資料
| 型號(hào)： | AD722 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | RGB to NTSC/PAL Encoder(RGB與NTSC/PAL制式轉(zhuǎn)換編碼器) |
| 中文描述： | RGB到的NTSC / PAL編碼器（與的RGB的NTSC / PAL制式轉(zhuǎn)換編碼器） |
| 文件頁數(shù)： | 10/12頁 |
| 文件大?。?/td> | 319K |
| 代理商： | AD722 |
REV. 0
–10–
AD722
Figure 15 shows a circuit for connection to the VGA port of a
PC. The RGB outputs connect directly to the respective inputs
of the AD722. These signals should each be terminated to
ground with 75
.
The standard 15-pin VGA connector has HSYNC on Pin 13
and VSYNC on Pin 14. These signals also connect directly to
the same name signals on the AD722. The FIN signal can be
provided by any of the means described elsewhere in the data
sheet. For a synchronous NTSC system, the internal 4FSC
(14.31818 MHz) clock that drives the VGA controller can be
used for FIN on the AD722. This signal is not directly accessible
from outside the computer, but it does appear on the VGA card.
If a separate RGB monitor is also to be used, it is not possible to
simply connect it to the R, G, and B signals. The monitor pro-
vides a termination that would double terminate these signals.
The R, G, and B signals should be buffered by three amplifiers
with high input impedances. These should be configured for a
gain of two, which is normalized by the divide by two termina-
tion scheme used for the RGB monitor.
The AD813 is a triple video amplifier that can provide the nec-
essary buffering in a single package. It also provides a disable
pin for each amplifier which can be used to disable the drive to
the RGB monitor when interlaced video is used (SELECT = LO).
When the RGB signals are noninterlaced, setting SELECT HI will
enable the AD813 to drive the RGB monitor and disable the en-
coding function of the AD722 via Pin 5. HSYNC and VSYNC
are logic level signals that can drive both the AD722 and RGB
monitor in parallel.
AD722 Used with an MPEG Decoder
MPEG decoding of compressed video signals is becoming a
more prevalent feature in many PC systems. To display images
on the computer monitor, video in RGB format is required.
However, to display the images on a TV monitor or to record
the images on a VCR, video in composite format is required.
Figure 16 shows a schematic for taking the 24-bit wide RGB
video from an MPEG decoder and creating both analog RGB
video and composite video.
The 24-bit wide RGB video is converted to analog RGB by the
ADV7120 (Triple 8-bit video DAC–available in 48-pin TQFP).
The analog current outputs from the DAC are terminated to
ground at both ends with 75
as called for in the data sheet.
These signals directly feed the analog inputs of the AD722. The
HSYNC and VSYNC signals from the MPEG Controller are di-
rectly applied to the AD722.
If the set of termination resistors closest to the AD722 are re-
moved, an RGB monitor can be connected to these signals and
it will provide the required second termination. This scenario is
acceptable as long as the RGB monitor is always present and
connected. If it is to be removed on occasion, another termina-
tion scheme is required.
The AD813 triple video op amp can provide buffering for such
applications. Each channel is set for a gain of two while the out-
puts are back terminated with a series 75
resistor. This pro-
vides the proper signal levels at the monitor which terminates
the lines with 75
.
AD722 APPLICATION DISCUSSION
Chrominance and Luminance Alignment
Inside the AD722 the chrominance and luminance signals are pro-
cessed by separate paths. They both are either output separately
(Y/C), or they are added together by the composite video ampli-
fier. Although both channels are filtered, the chrominance signal
experiences a greater filtering delay due to the higher order of
the chrominance path filters. To compensate, a sampled delay
line is used in the luminance path.
For baseband video it is desirable for the chrominance and lu-
minance to be accurately aligned with zero offset. However, the
situation for modulated RF video is a bit more complicated due
to the effects of the IF circuitry used in TV sets.
Figure 16. AD722 and ADV7120/ADV7122 Providing MPEG Video Solution
13
2
FIN
AGND
DGND
15
16 HSYNC
VSYNC
HSYNC
VSYNC
9
COMP
+
75
220μF
COMPOSITE
VIDEO
10
11
CRMA
LUMA
+
75
220μF
+
75
220μF
S-VIDEO
12
1
10k
5
AD722
ENCD
SELECT
STND
APOS
DPOS
0.1μF
0.01μF
10–30pF
L1 (FERRITE BEAD)
10μF
+5V (V
AA
)
33μF
+5V (V
CC
)
GND
ADV7120
SYNC
CLOCK
BLANK
GND
24
DATA IN
HSYNC
VSYNC
+5V (V
AA
)
10k
+5V
10k
0.1μF
0.01μF
R
SET
550
0.1μF
+5V
V
AA
V
REF
FS
ADJ
COMP
0.1μF
+5V (V
AA
)
8
RIN
GIN
BIN
75
75
75
IOG
IOR
IOB
3
MPEG
DECODER
6
7
+5V
10k
AD589
(1.2V REF)
14
4
+5V
OSC
0.1μF
+5V
CRYSTAL
75
75
75
*
PARALLEL–RESONANT
CRYSTAL; 3.579545MHz (NTSC)
OR 4.433620MHz (PAL)
CAPACITOR VALUE DEPENDS ON
CRYSTAL CHOSEN
**
FSC OR 4FSC CLOCK; 3.579545MHz,
14.31818MHz (NTSC) OR 4.433620MHZ,
17.734480MHz(PAL)
**
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD7233BN | LC2MOS 12-Bit Serial Mini-DIP DACPORT |
| AD7233AN | ; Series:M; Thermistor Type:NTC; Resistance:100kohm; Package/Case:Radial; Leaded Process Compatible:No; Peak Reflow Compatible (260 C):No; R/T Curve:4 RoHS Compliant: No |
| AD7237 | OPTOISOLATOR, 100% CTR TRANSISTOR OUTPUT |
| AD7247JN | LC2MOS DUAL 12-BIT DACPORT |
| AD7247JR | BATTERY LITHIUM CAMERA 3V 2-PACK |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD722-00E | 功能描述:SENSOR MAG SW 40G CROS AX 8-MSOP 制造商:nve corp/sensor products 系列:AD 包裝:管件 零件狀態(tài):有效 功能:全極開關(guān) 技術(shù):霍爾效應(yīng) 極化:任意一種 感應(yīng)范圍:±5mT 跳閘，±2.5mT 釋放 測(cè)試條件:-40°C ~ 125°C 電壓 - 電源:4.5 V ~ 30 V 電流 - 電源（最大值）:4.5mA 電流 - 輸出（最大值）:20mA 輸出類型:開路集電極 特性:- 工作溫度:-40°C ~ 125°C（TA） 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應(yīng)商器件封裝:8-MSOP 標(biāo)準(zhǔn)包裝:1,000 |
| AD722-02E | 功能描述:SENSOR MAG SW 40G CROS AXS 8SOIC 制造商:nve corp/sensor products 系列:AD 包裝:管件 零件狀態(tài):有效 功能:全極開關(guān) 技術(shù):霍爾效應(yīng) 極化:任意一種 感應(yīng)范圍:±5mT 跳閘，±2.5mT 釋放 測(cè)試條件:-40°C ~ 125°C 電壓 - 電源:4.5 V ~ 30 V 電流 - 電源（最大值）:4.5mA 電流 - 輸出（最大值）:20mA 輸出類型:開路集電極 特性:- 工作溫度:-40°C ~ 125°C（TA） 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應(yīng)商器件封裝:8-SOIC 標(biāo)準(zhǔn)包裝:1,000 |
| AD7224 | 制造商:AD 制造商全稱:Analog Devices 功能描述:LC2MOS 8-Bit DAC with Output Amplifiers |
| AD7224BQ | 制造商:Rochester Electronics LLC 功能描述:CMOS DAC IC - Bulk |
| AD7224CQ | 功能描述:IC DAC 8BIT W/AMP 18-CDIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:750 系列:- 設(shè)置時(shí)間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。