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參數(shù)資料
| 型號(hào)： | AD7245AAQ |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 4/16頁(yè) |
| 文件大小： | 0K |
| 描述： | IC DAC 12BIT W/REF 24-CDIP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 15 |
| 系列： | DACPORT® |
| 設(shè)置時(shí)間： | 7µs |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 雙 ± |
| 功率耗散（最大）： | 210mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類(lèi)型： | 通孔 |
| 封裝/外殼： | 24-CDIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 24-CDIP |
| 包裝： | 管件 |
| 輸出數(shù)目和類(lèi)型： | 1 電壓，單極；1 電壓，雙極 |
| 采樣率（每秒）： | 143k |
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AD7245A/AD7248A
REV. B
–12–
The circuit of Figure 10 can be modified to provide a pro-
grammable current source to AGND or –VSINK (for –VSINK,
dual supplies are required on the AD7245A/AD7248A). The
AD7245A/AD7248A is configured as before. The current through
R1 is mirrored with a current mirror circuit to provide the pro-
grammable source current (see CMOS DAC Application Guide,
Publication No. G872-30-10/84, for suitable current mirror
circuit). As before the absolute value of the source current will
be affected by the
±0.2% tolerance on V
REF. In this case the perfor-
mance of the current mirror will also affect the value of the
source current.
FUNCTION GENERATOR WITH PROGRAMMABLE
FREQUENCY
Figure 11 shows how the AD7245A/AD7248A with the AD537,
voltage-to-frequency converter and the AD639, trigonometric
function generator to provide a complete function generator
with programmable frequency. The circuit provides square wave,
triwave and sine wave outputs, each output of
±10 V amplitude.
The AD7245A/AD7248A provides a programmable voltage to
the AD537 input. Since both the AD7245A/AD7248A and
AD537 are guaranteed monotonic, the output frequency will
always increase with increasing digital code. The AD537 pro-
vides a square wave output which is conditioned for
±10 V by
amplifier A1. The AD537 also provides a differential triwave
output. This is conditioned by amplifiers A2 and A3 to provide the
±1.8 V triwave required at the input of the AD639. The triwave is
further scaled by amplifier A4 to provide a
±10 V output.
Adjusting the triwave applied to the AD639 adjust the distortion
performance of the sine wave output, (10 V in configuration
shown). Amplitude, offset and symmetry of the triwave can affect
the distortion. By adjusting these, via VR1 and VR2, an output
sine wave with harmonic distortion of better than –50 dB can be
achieved at low and intermediate frequencies.
Using the capacitor value shown in Figure 11 for CF (i.e., 680 pF)
the output frequency range is 0 to 100 kHz over the digital input
code range. The step size for frequency increments is 25 Hz.
The accuracy of the output frequency is limited to 8 or 9 bits by
the AD537, but is guaranteed monotonic to 12 bits.
MICROPROCESSOR INTERFACING—AD7245
AD7245A—8086 INTERFACE
Figure 12 shows the 8086 16-bit processor interfacing to the
AD7245A. In the setup shown in Figure 12, the double buffer-
ing feature of the DAC is not used and the
LDAC input is tied
LOW. AD0–AD11 of the 16-bit data bus are connected to the
AD7245A data bus (DB0–DB11). The 12-bit word is written
to the AD7245A in one MOV instruction and the analog output
responds immediately. In this example the DAC address is
D000. A software routine for Figure 12 is given in Table V.
8086
ALE
WR
AD15
AD0
*LINEAR CIRCUITRY OMITTED FOR CLARITY
ADDRESS/DATA BUS
AD7245A*
16-BIT
LATCH
ADDRESS
DECODE
ADDRESS BUS
CS
LDAC
WR
DB11
DB0
Figure 12. AD7245A to 8086 Interface
AD537
GND
DEC
VOS
C
+VS
O/P
C
–VS
20k
+VS
+
+15V
VDD
AD7245A/
AD7248A
RFB
VOUT
ROFS
VSS
DGND
AGND
REF
OUT
10V
SQUARE
WAVE
+15V
33k
82k
+15V
4.7k
+15V
56k
5.6k
5k
VR2
4.12k
10k
VR1
3.9k
22k
A1, A2, A3, A4 – 2
AD712
CF
680pF
A3
A4
–15V
+15V
1V
SINE WAVE
20k
15k
X1
X2
U1
U2
COM
Y2
+VS
W
Z1
Z2
UP
–VS
AD639
10V
TRI WAVE
10
0.1 F10 F
+
A2
A1
Figure 11. Programmable Function Generator
Since the tolerance value on the reference voltage of the AD7245A/
AD7248A is
±0.2%, then the absolute value of ISINK can vary by
±0.2% from device to device for a fixed value of R1.
Because the input bias current of the AD7245A/AD7248A’s op
amp is only of the order of picoamps, its effect on the sink cur-
rent is negligible. Tying the ROFS input to RFB input reduces this
effect even further and prevents noise pickup which could occur
if the ROFS pin was left unconnected.
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| AD7245AAR | 功能描述:IC DAC 12BIT W/REF 24-SOIC RoHS:否 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:DACPORT® 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:750 系列:- 設(shè)置時(shí)間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:28-LCC（J 形引線(xiàn)） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類(lèi)型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
| AD7245AAR-REEL | 功能描述:IC DAC 12BIT W/REF 24-SOIC T/R RoHS:否 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:DACPORT® 標(biāo)準(zhǔn)包裝:2,400 系列:- 設(shè)置時(shí)間:- 位數(shù):18 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:3 電壓電源:模擬和數(shù)字 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:36-TFBGA 供應(yīng)商設(shè)備封裝:36-TFBGA 包裝:帶卷 (TR) 輸出數(shù)目和類(lèi)型:* 采樣率（每秒）:* |
| AD7245AARZ | 功能描述:IC DAC 12BIT W/REF 24-SOIC RoHS:是 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:DACPORT® 標(biāo)準(zhǔn)包裝:1 系列:- 設(shè)置時(shí)間:4.5µs 位數(shù):12 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 125°C 安裝類(lèi)型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:8-SOICN 包裝:剪切帶 (CT) 輸出數(shù)目和類(lèi)型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:* 其它名稱(chēng):MCP4921T-E/SNCTMCP4921T-E/SNRCTMCP4921T-E/SNRCT-ND |
| AD7245AARZ-REEL | 功能描述:IC DAC 12BIT W/REF 24-SOIC RoHS:是 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:DACPORT® 標(biāo)準(zhǔn)包裝:47 系列:- 設(shè)置時(shí)間:2µs 位數(shù):14 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:55µW 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:管件 輸出數(shù)目和類(lèi)型:1 電流，單極；1 電流，雙極 采樣率（每秒）:* |
| AD7245ABN | 功能描述:IC DAC 12BIT W/REF 24-DIP RoHS:否 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:DACPORT® 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:750 系列:- 設(shè)置時(shí)間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:28-LCC（J 形引線(xiàn)） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類(lèi)型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
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