參數(shù)資料
型號: AD7274
廠商: Analog Devices, Inc.
元件分類: 串行ADC
英文描述: 3MSPS,10-/12-Bit ADCs in 8-Lead TSOT
中文描述: 3MSPS,10-/12-Bit模數(shù)轉(zhuǎn)換器在8引腳TSOT
文件頁數(shù): 4/20頁
文件大小: 243K
代理商: AD7274
–4–
REV. PrB
PRELIMINARY TECHNICAL DATA
AD7274-SPECIFICATIONS
Parameter B Grade
1
Units
Test Conditions/Comments
DYNAMIC PERFORMANCE
Signal-to-Noise + Distortion (SINAD)
2
Signal-to-Noise Ratio (SNR)
Total Harmonic Distortion (THD)
2
Peak Harmonic or Spurious Noise (SFDR)
2
Intermodulation Distortion (IMD)
2
Second Order Terms -84
Third Order Term -84
Aperture Delay
Aperture Jitter
Full Power Bandwidth
Full Power Bandwidth
Power Supply Rejection Ratio (PSRR)
f
IN
= 1 MHz Sine Wave
70
71
-80
-82
dB min
dB min
dB typ
dB typ
dB typ
dB typ
ns typ
ps typ
MHz typ
MHz typ
dB typ
fa= TBD kHz, fb= TBD kHz
fa= TBD kHz, fb= TBD kHz
TBD
TBD
TBD
TBD
TBD
@ 3 dB
@ 0.1dB
DC ACCURACY
Resolution
Integral Nonlinearity
2
Differential Nonlinearity
2
Offset Error
2
Gain Error
2
Total Unadjusted Error (TUE)
2
12
±1
±1
±TBD
±TBD
±TBD
Bits
LSB max
LSB max Guaranteed No Missed Codes to 12 Bits
LSB max
LSB max
LSB max
ANALOG INPUT
Input Voltage Range
0 to V
REF
DC Leakage Current
Input Capacitance
Volts
μA max
pF typ
±0.5
TBD
REFERENCE INPUT
V
REF
Input Voltage Range 1.2 to V
DD
Vmin/Vmax
DC leakage Current ±TBD
Input Capacitance
Input Impedance
μA max
pF max
k
typ
TBD
TBD
LOGIC INPUTS
Input High Voltage, V
INH
0.7(V
DD
)
V min
V min
V max
V max
μA max
μA max
pF max
2.35V Vdd
2.7V < Vdd 3.6V
2.35V Vdd< 2.7V
2.7V
Vdd 3.6V
Typically TBD nA, V
IN
= 0 V or V
DD
2.7V
2
Input Low Voltage, V
INL
0.2(V
DD
)
0.8
Input Current, I
IN
,SCLK Pin ±0.5
Input Current, I
IN
,
Pin
Input Capacitance, C
IN3
LOGIC OUTPUTS
Output High Voltage, V
OH
V
DD
- 0.2
Output Low Voltage, V
OL
Floating-State Leakage Current
Floating-State Output Capacitance
3
Output Coding Straight (Natural) Binary
±TBD
10
V min
V max
μA max
pF max
I
SOURCE
= 200 μA;V
DD
= 2.35 V to 3.6 V
I
SINK
=200 μA
0.2
±1
10
CONVERSION RATE
Conversion Time
Track/Hold Acquisition Time
2
Throughput Rate
270
50
3
ns max
ns max
MSPS max
14 SCLK Cycles with SCLK at 52 MHz
See Serial Interface Section
(
V
DD
=+2.35 V to +3.6 V, V
REF
= +2.5V, f
SCLK
=52 MHz, f
SAMPLE
=3MSPS unless otherwise
noted; T
A
=T
MIN
to T
MAX
, unless otherwise noted.)
NOTES
1
Temperature range from –40°C to +85°C.
2
See Terminology.
3
Guranteed by Characterization.
Specifications subject to change without notice.
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