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參數(shù)資料
| 型號： | AD7274BUJ-REEL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | 3MSPS,10-/12-Bit ADCs in 8-Lead TSOT |
| 中文描述： | 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO8 |
| 封裝： | MO-193BA, TSOT-8 |
| 文件頁數(shù)： | 2/20頁 |
| 文件大?。?/td> | 243K |
| 代理商： | AD7274BUJ-REEL |
–2–
REV. PrB
PRELIMINARY TECHNICAL DATA
AD7273-SPECIFICATIONS
(
V
DD
=+2.35 V to +3.6 V, V
REF
= +2.5V
, f
SCLK
=52 MHz, f
SAMPLE
=3 MSPS unless other-
wise noted; T
A
=T
MIN
to T
MAX
, unless otherwise noted.)
Parameter
B Grade
1
Units
Test Conditions/Comments
DYNAMIC PERFORMANCE
Signal-to-Noise + Distortion (SINAD)
2
Total Harmonic Distortion (THD)
2
-73
Peak Harmonic or Spurious Noise (SFDR)
2
-74
Intermodulation Distortion (IMD)
2
Second Order Terms -82
Third Order Terms -82
Aperture Delay
Aperture Jitter
Full Power Bandwidth
Full Power Bandwidth
Power Supply Rejection Ratio (PSRR)
f
IN
= 1 MHz Sine Wave
61
dB min
dB max
dB max
dB typ
dB typ
ns typ
ps typ
MHz typ
MHz typ
dB typ
fa= TBD kHz, fb= TBD kHz
fa= TBD kHz, fb= TBD kHz
TBD
TBD
TBD
TBD
TBD
@ 3 dB
@ 0.1dB
DC ACCURACY
Resolution
Integral Nonlinearity
2
Differential Nonlinearity
2
Offset Error
2
10
±0.5
±0.5
±1
±TBD
±1
±TBD
±TBD
Bits
LSB max
LSB max
LSB max
LSB typ
LSB max
LSB typ
LSB max
Guaranteed No Missed Codes to 10 Bits
Gain Error
2
Total Unadjusted Error (TUE)
2
ANALOG INPUT
Input Voltage Range 0 to V
REF
DC Leakage Current
Input Capacitance
Volts
μA max
pF typ
±0.5
TBD
REFERENCE INPUT
V
REF
Input Voltage Range 1.2 to V
DD
Vmin/Vmax
DC leakage Current
Input Capacitance
Input Impedance
±TBD
TBD
TBD
μA max
pF max
k
typ
LOGIC INPUTS
Input High Voltage, V
INH
0.7(V
DD
) V min
2
0.2(V
DD
) V max
0.8
±0.5
±TBD
10
2.35V Vdd
2.7V< Vdd
2.35V Vdd< 2.7V
2.7V
Vdd 3.6V
Typically TBD nA, V
IN
= 0 V or V
DD
2.7V
3.6V
V min
Input Low Voltage, V
INL
V max
μA max
μA max
pF max
Input Current, I
IN
, SCLK Pin
Input Current, I
IN
,
Input Capacitance, C
IN3
Pin
LOGIC OUTPUTS
Output High Voltage, V
OH
V
DD
- 0.2
Output Low Voltage, V
OL
0.2
Floating-State Leakage Current ±1
Floating-State Output Capacitance
3
10
Output Coding Straight (Natural) Binary
V min
V max
μA max
pF max
I
SOURCE
= 200 μA,V
DD
= 2.35 V to 3.6 V
I
SINK
= 200μA
CONVERSION RATE
Conversion Time
Track/Hold Acquisition Time
2
Throughput Rate
230
50
3
ns max
ns max
MSPS max
12 SCLK cycles with SCLK at 52 MHz
NOTES
1
Temperature range from –40°C to +85°C.
2
See Terminology.
3
Guaranteed by Characterization.
Specifications subject to change without notice.
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