AD7304/AD7305
Rev. C | Page 11 of 20
CS
5V
0V
VOUT
01114-016
VDD = 5V
VREF = 4V
DATA = 0x00
0xFF
2
s/DIV
Figure 16. Large-Signal Settling Time
VOUTA
–5V
0V
+5V
–5V
0V
+5V
VREFIN
(
±5V @
50kHz)
DATA = 0xFF
01114-017
2
s/DIV
Figure 17. Multiplying Mode Step Response and Output Slew Rate
FREQUENCY (Hz)
6
–8
10k
10M
GAIN
(
d
B)
4
1M
100k
0
–4
–6
VDD = +5V
VSS = –5V
DATA = 0xFF
VREF = 100mV rms
f–3dB = 2.6MHz
01114-018
Figure 18. Multiplying Mode Gain vs. Frequency
VOUT
CS
RL = 10k
RL = 70k
NO LOAD
VDD = 5V
CL = 150pF
01114-019
5
s/DIV
Figure 19. Time to Shutdown
CS
VOUT
IDD
1mA/V
VDD = 5V
01114-020
Figure 20. Shutdown Recovery Time (Wakeup)
VREF AMPLITUDE (V p-p)
10
1
0.001
10m
10
1
THD
(%)
23
4
5
6
7
8
9
0.1
0.01
VDD = +5V
VSS = –5V
01114-021
Figure 21. THD vs. Reference Input Amplitude