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參數(shù)資料
| 型號： | AD7324BRUZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 16/37頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 12BIT+ SAR 4CHAN 16TSSOP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 1M |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 30mW |
| 電壓電源： | 雙 ± |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-TSSOP |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 4 個(gè)單端，單極；4 個(gè)單端，雙極；2 個(gè)差分，單極；2 個(gè)差分，雙極 |
| 產(chǎn)品目錄頁面： | 777 (CN2011-ZH PDF) |
| 配用： | EVAL-AD7324CBZ-ND - BOARD EVALUATION FOR AD7324CBZ |
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AD7324
Data Sheet
Rev. B | Page 22 of 36
REGISTERS
The AD7324 has three programmable registers, the control register, the sequence register, and the range register. These registers are write-
only registers.
ADDRESSING REGISTERS
A serial transfer on the AD7324 consists of 16 SCLK cycles. The three MSBs on the DIN line during the 16 SCLK transfer are decoded to
determine which register is addressed. The three MSBs consist of the write bit, the Register Select 1 bit, and the Register Select 2 bit. The
register select bits are used to determine which of the three on-board registers is selected. The write bit determines if the data on the DIN
line following the register select bits loads into the addressed register. If the write bit is 1, the bits load into the register addressed by the
register select bits. If the write bit is 0, the data on the DIN line does not load into any register.
Combinations of the write bit, the Register Select 1 bit, and the Register Select 2 bit other than those specified in Table 8 access registers
for Analog Devices internal use only. Do not access these registers, as doing so may lead to unspecified operation of the device.
Table 8. Decoding Register Select Bits and Write Bit
Write
Register Select 1
Register Select 2
Comment
0
Data on the DIN line during this serial transfer is ignored.
1
0
This combination selects the control register. The subsequent 12 bits are loaded into
the control register.
1
0
1
This combination selects the range register. The subsequent 8 bits are loaded into the
range register.
1
This combination selects the sequence register. The subsequent 4 bits are loaded into
the sequence register.
CONTROL REGISTER
The control register is used to select the analog input channel, analog input configuration, reference, coding, and power mode. The
control register is a write-only, 12-bit register. Data loaded on the DIN line corresponds to the AD7324 configuration for the next
conversion. If the sequence register is being used, data should be loaded into the control register after the range register and the sequence
register have been initialized. The bit functions of the control register are shown in Table 9 (the power-up status of all bits is 0).
MSB
LSB
15
14
13
12
11
10
9
8
7
6
5
1
3
2
1
0
Write
Register
Select 1
Register
Select 2
ZERO
ADD1
ADD0
Mode 1
Mode 0
PM1
PM0
Coding
Ref
Seq1
Seq2
ZERO
0
Table 9. Control Register Details
Bit
Mnemonic
Description
12, 1
ZERO
A 0 must be written to this bit to ensure correct operation of the device.
11, 10
ADD1, ADD0
These two channel address bits are used to select the analog input channel for the next conversion if the
sequencer is not being used. If the sequencer is being used, the two channel address bits are used to
select the final channel in a consecutive sequence.
9, 8
Mode 1, Mode 0
These two mode bits are used to select the configuration of the four analog input pins, VIN0 to VIN3. These
pins are used in conjunction with the channel address bits. On the AD7324, the analog inputs can be
configured as four single-ended inputs, two true differential input pairs, two pseudo differential inputs, or
three pseudo differential inputs (see Table 10).
7, 6
PM1, PM0
The power management bits are used to select different power mode options on the AD7324 (see Table 11).
5
Coding
This bit is used to select the type of output coding the AD7324 uses for the next conversion result. If
coding = 0, the output coding is twos complement. If coding = 1, the output coding is straight binary.
When operating in sequence mode, the output coding for each channel is the value written to the coding
bit during the last write to the control register.
4
Ref
The reference bit is used to enable or disable the internal reference. If Ref = 0, the external reference is
enabled and used for the next conversion, and the internal reference is disabled. If Ref = 1, the internal
reference is used for the next conversion. When operating in sequence mode, the reference used for each
channel is the value written to the Ref bit during the last write to the control register.
3, 2
Seq1, Seq2
The Sequence 1 and Sequence 2 bits are used to control the operation of the sequencer (see Table 12).
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| AD7324BRUZ-REEL | 功能描述:IC ADC 12BIT+SAR 4CHAN 16-TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):16 采樣率（每秒）:45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個(gè)單端，單極 |
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| AD7327 | 制造商:AD 制造商全稱:Analog Devices 功能描述:500 kSPS, 8-Channel, Software-Selectable, True Bipolar Input, 12-Bit Plus Sign ADC |
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