參數(shù)資料
型號: AD7376ARU10
廠商: ANALOG DEVICES INC
元件分類: 數(shù)字電位計
英文描述: +-15 V Operation Digital Potentiometer
中文描述: 10K DIGITAL POTENTIOMETER, 3-WIRE SERIAL CONTROL INTERFACE, 128 POSITIONS, PDSO14
封裝: MO-153AB-1, TSSOP-14
文件頁數(shù): 3/12頁
文件大小: 335K
代理商: AD7376ARU10
–3–
REV. 0
AD7376
ORDE RING GUIDE
T emperature
Range
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
Package
Description
Package
Options
Model
k
V
AD7376AN10
AD7376AR10
AD7376ARU10
AD7376AN50
AD7376AR50
AD7376ARU50
AD7376AN100
AD7376AR100
AD7376ARU100
AD7376AN1M
AD7376AR1M
AD7376ARU1M
Die Size: 101.6 mil
×
127.6 mil, 2.58 mm
×
3.24 mm
Number T ransistors: 840
10
10
10
50
50
50
100
100
100
1,000
1,000
1,000
PDIP-14
SOL-16
T SSOP-14
PDIP-14
SOL-16
T SSOP-14
PDIP-14
SOL-16
T SSOP-14
PDIP-14
SOL-16
T SSOP-14
N-14
R-16
RU-14
N-14
R-16
RU-14
N-14
R-16
RU-14
N-14
R-16
RU-14
NOT ES
1
T ypicals represent average readings at +25
°
C, V
= +15 V, and V
= –15 V.
1
2
Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper posi-
tions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic. See Figure 27. T est Circuit.
1
3
INL and DNL are measured at V
with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. V
A
= V
DD
and V
B
= 0 V. DNL
specification limits of
±
1 LSB maximum are Guaranteed Monotonic operating conditions. See Figure 26. T est Circuit.
1
4
Resistor terminals A, B, W have no limitations on polarity with respect to each other.
1
5
Guaranteed by design and not subject to production test.
1
6
Measured at the A terminal. A terminal is open circuit in shutdown mode.
1
7
I
OL
= 200
μ
A for the 50 k
version operating at V
= +5 V.
1
8
P
is calculated from (I
×
V
). CMOS logic level inputs result in minimum power dissipation.
1
9
Bandwidth, noise and settling time are dependent on the terminal resistance value chosen. T he lowest R value results in the fastest settling time and highest band-
width. T he highest R value results in the minimum overall power consumption.
10
All dynamic characteristics use V
= +15 V and V
= –15 V.
11
See timing diagram for location of measured values. All input control voltages are specified with t
R
= t
F
= 1 ns (10% to 90% of V
DD
) and timed from a voltage level
of 1.6 V. Switching characteristics are measured using both V
= +5 V or +15 V.
12
Propagation delay depends on value of V
DD
, R
L
and C
L
see Applications section.
Specifications subject to change without notice.
WARNING!
ESD SENSITIVE DEVICE
C AUT ION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7376 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. T herefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
ABSOLUT E MAX IMUM RAT INGS
(T
A
= +25
°
C, unless otherwise noted)
V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, +30 V
V
SS
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V, –16.5 V
V
DD
to V
SS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, +44 V
V
A
, V
B
, V
W
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . V
SS
, V
DD
A
X
– B
X
, A
X
– W
X
, B
X
– W
X
. . . . . . . . . . . . . . . . . . .
±
20 mA
Digital Input Voltages to GND . . . . . . . . . . 0 V, V
DD
+ 0.3 V
Digital Output Voltage to GND . . . . . . . . . . . . . . 0 V, +30 V
Operating T emperature Range . . . . . . . . . . . –40
°
C to +85
°
C
Maximum Junction T emperature (T
J
MAX ) . . . . . . .+150
°
C
Storage T emperature . . . . . . . . . . . . . . . . . . –65
°
C to +150
°
C
Lead T emperature (Soldering, 10 sec) . . . . . . . . . . . .+300
°
C
Package Power Dissipation . . . . . . . . . . . . (T
J
MAX – T
A
)/
θ
JA
T hermal Resistance
θ
JA
P-DIP (N-14) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
°
C/W
SOIC (SOL-16) . . . . . . . . . . . . . . . . . . . . . . . . . . 120
°
C/W
T SSOP-14 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 240
°
C/W
PIN CONFIGURAT IONS
PDIP & T SSOP-14 SOL-16
14
13
12
11
10
9
8
1
2
3
4
7
6
5
TOP VIEW
(Not to Scale)
NC = NO CONNECT
AD7376
W
NC
V
DD
SDO
SHDN
SDI
NC
A
B
V
SS
GND
CS
RS
CLK
14
13
12
11
16
15
10
9
8
1
2
3
4
7
6
5
TOP VIEW
(Not to Scale)
AD7376
NC = NO CONNECT
W
NC
V
DD
SDO
SDI
NC
NC
A
B
V
SS
GND
CLK
NC
SHDN
CS
RS
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