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參數(shù)資料
| 型號： | AD7400 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Isolated Sigma-Delta Modulator |
| 中文描述： | 隔離式Σ-Δ調(diào)制器 |
| 文件頁數(shù)： | 4/10頁 |
| 文件大小： | 951K |
| 代理商： | AD7400 |
AD7400/AD7401
Preliminary Technical Data
AD7401—SPECIFICATIONS
3
Table 2. (V
DD1
= V
DD2
= 4.5V to 5.5V, , V
IN
+ = -200mV to +200mV and V
IN
- = 0V; T
A
= T
MIN
to T
MAX
, f
MCLK
= 20MHz unless
otherwise noted.)
Parameter
B Version
1,5
Units
STATIC PERFORMANCE
Resolution
16
Bits min
Integral Nonlinearity
2
±4
LSB max
Differential Nonlinearity
2
±0.9
LSB max
Offset Error
2
±0.5
mV max
Offset Drift vs. Temperature
2
5
2
μV/ C typ
Offset Drift vs. V
DD12
0.05
mV/V typ
Absolute Reference Voltage Tolerance
±1
%min/max
Reference Voltage Matching
±TBD
%min/max
V
REF
Drift vs. Temperature
2
60
ppm/ C typ
V
REF
Drift vs. V
DD12
0.2
% typ
ANALOG INPUT
Input Voltage Ranges
6
±200
mV min/max
DC Leakage Current
±1
μA max
DYNAMIC SPECIFICATIONS
Signal to Noise + Distortion Ratio (SINAD)
4
70
76
dB typ
Total Harmonic Distortion (THD)
2
-80
dB typ
Peak Harmonic or Spurious Noise (SFDR)
2
-70
dB typ
Effective number of bits
12
Bits
Isolation Transient Immunity
15
20
kV/μs typ
Signal Delay
10
12
μs max
LOGIC INPUTS
Input High Voltage, V
INH
2
V min
Input Low Voltage, V
INL
0.8
V max
Input Current, I
IN
±1
μA max
Input Capacitance, C
IN3
10
pF max
LOGIC OUTPUTS
Output High Voltage, V
OH
V
DD2
– 0.1
V min
Output Low Voltage, V
OL
0.4
V max
POWER REQUIREMENTS
V
DD1
+4.5/+5.5
Vmin/Vmax
V
DD2
+4.5/+5.5
Vmin/Vmax
+2.7/+3.3
Vmin/Vmax
I
DD17
21.2
mA max
I
DD27
3.92
mA max
Test Conditions/Comments
When Tested with Sinc
3
Filter
4
Filter output trunctaed to 16 Bits
Guaranteed No Missed Codes to 15 bits
Bipolar Input Range
μV/ C max
When Tested with Sinc
3
Filter
4
V
IN
+ = 35Hz, 400mV
pk-pk
sine wave
dBmin
kV/μs min
μs typ
Delay through filter varies with actual value of on-
board clock. Decimation by 2.
I
O
= -20 μA
I
O
= 20 μA
V
DD1
= 5V, Digital I/Ps = 0 V or V
DD1
NOTES
3
Temperature ranges as follows: -40 C to +105 C
4
See Terminology section.
3
Sample tested @ 25 C to ensure compliance.
4
Filter as defined by Verilog Code.
5
All voltages are relative to their respective ground.
6
Beyond the full-scale input range the output is either all zeroes or all ones.
Specifications subject to change without notice.
Rev. PrH | Page 4 of 10
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參數(shù)描述 |
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| AD7400_06 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Isolated Sigma-Delta Modulator |
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| AD7400AYNSZ | 功能描述:IC MODULATOR SIGMADELTA 8-SMD RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - ADCs/DAC - 專用型 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 類型:數(shù)據(jù)采集系統(tǒng)（DAS） 分辨率（位）:16 b 采樣率（每秒）:21.94k 數(shù)據(jù)接口:MICROWIRE?，QSPI?，串行，SPI? 電壓電源:模擬和數(shù)字 電源電壓:1.8 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:40-TQFN-EP（6x6） 包裝:托盤 |
| AD7400AYNSZREEL | 制造商:AD 制造商全稱:Analog Devices 功能描述:Isolated Sigma-Delta Modulator |
| AD7400AYNSZREEL7 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Isolated Sigma-Delta Modulator |
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