參數(shù)資料
型號(hào): AD7400BRW
廠商: ANALOG DEVICES INC
元件分類: 模擬信號(hào)調(diào)理
英文描述: Isolated Sigma-Delta Modulator
中文描述: SPECIALTY ANALOG CIRCUIT, PDSO16
封裝: SOIC-16
文件頁(yè)數(shù): 5/10頁(yè)
文件大?。?/td> 951K
代理商: AD7400BRW
Preliminary Technical Data
AD7400/AD7401
TIMING SPECIFICATIONS
1
Table 3. AD7400/AD7401 Timing Specifications
(V
DD1
= V
DD2
= 4.5V to 5.5V,
T
A
= T
MAX
to T
MIN
unless otherwise noted.)
Parameter
Limit at T
MIN
, T
MAX
Unit
Description
F
MCLKOUT
10
MHz typ
AD7400
8.2/13.2
MHz min/max
T
MCLKIN2
1
MHz min
AD7401
20
MHz max
t
13
30
ns max
Data Access Time after MCLK Rising Edge
t
23
15
ns min
Data Hold Time after MCLK Rising Edge
t
3
0.4 x t
MCLKIN
ns max
Master Clock Low Time
t
4
0.4 x t
MCLKIN
ns max
Master Clock High Time
NOTES
1
Sample tested @ 25 C to ensure compliance. All input signals are specified with tr = tf = 5ns (10% to 90% of V
DD1
) and timed form a voltage level of 1.6 Volts. See Figure
1.
2
Mark Space ratio for the MCLKIN input is 40/60 to 60/40.
3
Measured with the load circuit of Figure 1 and defined as the time required for the output to cross 0.8V or 2.0V.
+1.6V
IOL
200μA
200μA
IOH
TO
OUTPUT
PIN
CL
50pF
Figure 1. Load Circuit for Digital Output Timing Specifications
MCLKIN /
MCLKOUT
MDAT
t
1
t
2
t
3
t
4
Figure 2. Data Timing
Rev. PrH | Page 5 of 10
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