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參數(shù)資料
| 型號： | AD7401YRWZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 9/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MODULATOR SIGMA-DELTA 16SOIC |
| 標準包裝： | 1,000 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 20M |
| 數(shù)據(jù)接口： | 串行 |
| 轉換器數(shù)目： | 1 |
| 功率耗散（最大）： | 93.5mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.295"，7.50mm 寬） |
| 供應商設備封裝： | 16-SOIC W |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 1 個差分，雙極 |
AD7401
Rev. D | Page 17 of 20
APPLICATIONS INFORMATION
GROUNDING AND LAYOUT
Supply decoupling with a value of 100 nF is strongly recom-
mended on both VDD1 and VDD2. Decoupling on one or both
VDD1 pins does not affect performance significantly. In applications
involving high common-mode transients, care should be taken
to ensure that board coupling across the isolation barrier is
minimized. Furthermore, the board layout should be designed
so that any coupling that occurs equally affects all pins on a
given component side. Failure to ensure this may cause voltage
differentials between pins to exceed the absolute maximum
ratings of the device, thereby leading to latch-up or permanent
damage. Any decoupling used should be placed as close to the
supply pins as possible.
Series resistance in the analog inputs should be minimized to
avoid any distortion effects, especially at high temperatures. If
possible, equalize the source impedance on each analog input to
minimize offset. Beware of mismatch and thermocouple effects
on the analog input PCB tracks to reduce offset drift.
EVALUATING THE AD7401 PERFORMANCE
A simple standalone AD7401 evaluation board is available with
split ground planes and a board split beneath the AD7401
package to ensure isolation. This board allows access to each
pin on the device for evaluation purposes. External supplies and
all other circuitry (such as a digital filter) must be provided by
the user.
INSULATION LIFETIME
All insulation structures, subjected to sufficient time and/or
voltage, are vulnerable to breakdown. In addition to the testing
performed by the regulatory agencies, Analog Devices has
carried out an extensive set of evaluations to determine the
lifetime of the insulation structure within the AD7401.
These tests subjected populations of devices to continuous
cross-isolation voltages. To accelerate the occurrence of failures,
the selected test voltages were values exceeding those of normal
use. The time-to-failure values of these units were recorded and
used to calculate acceleration factors. These factors were then
used to calculate the time to failure under normal operating
conditions. The values shown in Table 7 are the lesser of the
following two values:
The value that ensures at least a 50-year lifetime of
continuous use
The maximum CSA/VDE approved working voltage
It should also be noted that the lifetime of the AD7401 varies
according to the waveform type imposed across the isolation
barrier. The iCoupler insulation structure is stressed differently
depending on whether the waveform is bipolar ac, unipolar ac,
isolation voltage waveforms.
0V
RATED PEAK VOLTAGE
05
85
1-
0
3
9
Figure 30. Bipolar AC Waveform
0V
RATED PEAK VOLTAGE
0
585
1-
0
40
Figure 31. Unipolar AC Waveform
0V
RATED PEAK VOLTAGE
058
51
-04
1
Figure 32. DC Waveform
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