108 R3 100 OUTPUT AD743 *OPTIONAL, SEE TEXT INPUT SENSITIVITY = –179 d" />
參數(shù)資料
型號: AD743JRZ-16-REEL7
廠商: Analog Devices Inc
文件頁數(shù): 3/12頁
文件大?。?/td> 0K
描述: IC OPAMP BIFET 4.5MHZ LN 16SOIC
標(biāo)準(zhǔn)包裝: 400
放大器類型: J-FET
電路數(shù): 1
轉(zhuǎn)換速率: 2.8 V/µs
-3db帶寬: 4.5MHz
電流 - 輸入偏壓: 250pA
電壓 - 輸入偏移: 250µV
電流 - 電源: 8.1mA
電流 - 輸出 / 通道: 40mA
電壓 - 電源,單路/雙路(±): 9.6 V ~ 36 V,±4.8 V ~ 18 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC W
包裝: 帶卷 (TR)
REV. E
AD743
–11–
R2
1900
R4*
R1
108
R3
100
OUTPUT
AD743
*OPTIONAL, SEE TEXT
INPUT SENSITIVITY = –179 dB re. 1V/ Pa**
**1V PER MICROPASCAL
B AND K TYPE 8100
HYDROPHONE
CT
CC
C1*
Figure 15b. AC-Coupled, Low Noise
Hydrophone Amplifier
R5
100k
R1
108
R4*
108
OUTPUT
DC OUTPUT
1mV FOR IB (AD743)
100nA
CT
C1*
AD743
R2
1900
R6
1M
R7
16M
*OPTIONAL, SEE TEXT
C2
0.27 F
R3
100
B AND K
TYPE 8100
HYDROPHONE
AD711K
Figure 15c. Hydrophone Amplifier Incorporating a
DC Servo Loop
where the dc gain is 1 and the gain above the low frequency cutoff
(1/(2
πC
C(100
))) is the same as the circuit of Figure 15a. The
circuit of Figure 15c uses a dc servo loop to keep the dc output
at 0 V and to maintain full dynamic range for IB up to 100 nA.
The time constant of R7 and C2 should be larger than that of
R1 and CT for a smooth low frequency response.
The transducer shown has a source capacitance of 7500 pF. For
smaller transducer capacitances (
≤300 pF), the lowest noise can
be achieved by adding a parallel RC network (R4 = R1, C1 = CT)
in series with the inverting input of the AD743.
BALANCING SOURCE IMPEDANCES
As mentioned previously, it is good practice to balance the
source impedances (both resistive and reactive) as seen by the
inputs of the AD743. Balancing the resistive components will
optimize dc performance over temperature because balancing
will mitigate the effects of any bias current errors. Balancing
input capacitance will minimize ac response errors due to the
amplifier’s input capacitance and, as shown in Figure 16, noise
performance will be optimized. Figure 17 shows the required
external components for noninverting (A) and inverting (B)
configurations.
INPUT CAPACITORS (pF)
RTI
VOLTAGE
NOISE
(nV/
Hz
)
40
30
20
10
100
1000
UNBALANCED
BALANCED
2.9nV/
√Hz
Figure 16. RTI Voltage Noise vs. Input Capacitance
OUTPUT
R1
R2
RB
CB
CS
RS
NONINVERTING
CONNECTION
A
CB = CS
RB = RS
FOR
RS >> R1 OR R2
OUTPUT
R1
CS
CF
CB
RS
RB
INVERTING
CONNECTION
B
CB = CF CS
RB = R1 RS
Figure 17. Optional External Components for Balancing Source Impedances
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