參數(shù)資料
型號: AD7476BRT-REEL
廠商: ANALOG DEVICES INC
元件分類: ADC
英文描述: +3.3V, 2.125Gbps/1.0625Gbps Fibre-Channel Port Bypass ICs
中文描述: 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO6
封裝: PLASTIC, MO-178AB, SOT-23, 6 PIN
文件頁數(shù): 7/20頁
文件大小: 360K
代理商: AD7476BRT-REEL
REV. D
AD7476/AD7477/AD7478
–7–
PIN CONFIGURATION
TOP VIEW
(Not to Scale)
6
5
4
1
2
3
V
DD
GND
V
IN
CS
SDATA
SCLK
AD7476/
AD7477/
PIN FUNCTION DESCRIPTIONS
Pin
No.
Mnemonic
Function
1
2
V
DD
GND
Power Supply Input. The V
DD
range for the AD7476/AD7477/AD7478 is from 2.35 V to 5.25 V.
Analog Ground. Ground reference point for all circuitry on the AD7476/AD7477/AD7478. All analog
input signals should be referred to this GND voltage.
Analog Input. Single-ended analog input channel. The input range is 0 V to V
DD
.
Serial Clock. Logic input. SCLK provides the serial clock for accessing data from the part. This clock
input is also used as the clock source for the AD7476/AD7477/AD7478’s conversion process.
Data Out. Logic output. The conversion result from the AD7476/AD7477/AD7478 is provided on
this output as a serial data stream. The bits are clocked out on the falling edge of the SCLK input. The
data stream from the AD7476 consists of four leading zeros followed by the 12 bits of conversion data,
which is provided MSB first; the data stream from the AD7477 consists of four leading zeros followed
by the 10 bits of conversion data, followed by two trailing zeros, which is also provided MSB first; the
data stream from the AD7478 consists of four leading zeros followed by the eight bits of conversion
data, followed by four trailing zeros, which is provided MSB first.
Chip Select. Active low logic input. This input provides the dual function of initiating conversions on
the AD7476/AD7477/AD7478 and framing the serial data transfer.
3
4
V
IN
SCLK
5
SDATA
6
CS
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