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參數(shù)資料
| 型號： | AD7477ART |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | +3.0V to +5.5V, 1.25Gbps/2.5Gbps Limiting Amplifiers |
| 中文描述： | 1-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO6 |
| 封裝： | PLASTIC, MO-178AB, SOT-23, 6 PIN |
| 文件頁數(shù)： | 11/20頁 |
| 文件大小： | 360K |
| 代理商： | AD7477ART |
REV. D
AD7476/AD7477/AD7478
–11–
Alternatively, because the supply current required by the
AD7476/AD7477/AD7478 is so low, a precision reference can be
used as the supply source to the AD7476/AD7477/AD7478. A
REF19x voltage reference (REF195 for 5 V, or REF193 for 3 V)
can be used to supply the required voltage to the ADC (see
Figure 6). This configuration is especially useful if the power
supply is quite noisy or if the system supply voltages are at some
value other than 5 V or 3 V (e.g., 15 V). The REF19x will output
a steady voltage to the AD7476/AD7477/AD7478. If the low
dropout REF193 is used, the current it typically needs to supply
to the AD7476/AD7477/AD7478 is 1 mA. When the ADC is
converting at a rate of 1 MSPS, the REF193 will need to supply a
maximum of 1.6 mA to the AD7476/AD7477/AD7478. The load
regulation of the REF193 is typically 10 ppm/mA (REF193, V
S
=
5 V), which results in an error of 16ppm (48
μ
V) for the 1.6 mA
drawn from it. This corresponds to a 0.065 LSB error for the
AD7476 with V
DD
= 3 V from the REF193, a 0.016 LSB error for
the AD7477, and a 0.004 LSB error for the AD7478. For applica-
tions where power consumption is of concern, the Power-Down
mode of the ADC and the Sleep mode of the REF19x reference
should be used to improve power performance. See the Modes of
Operation section.
AD7476/
AD7477/
AD7478
V
DD
V
IN
GND
0V TO V
INPUT
1 F
TANT
0.1 F
REF193
10 F
0.1 F
5V
SUPPLY
SCLK
SDATA
CS
SERIAL
INTERFACE
C/ P
3V
1mA
680nF
Figure 6. REF193 as Power Supply to AD7476/AD7477/
AD7478
Table I provides some typical performance data with various
references used as a V
DD
source with a low frequency analog
input. Under the same setup conditions, the references were
compared and the AD780 proved the optimum reference.
Table I.
Reference Tied
to V
DD
AD780 @ 3 V
REF193
AD7476 SNR Performance
1 kHz Input (dB)
71.17
70.4
AD780 @ 2.5 V
REF192
AD1582
71.35
70.93
70.05
Analog Input
Figure 7 shows an equivalent circuit of the analog input structure
of the AD7476/AD7477/AD7478. The two diodes D1 and D2
provide ESD protection for the analog inputs. Care must be
taken to ensure that the analog input signal never exceeds the
supply rails by more than 300 mV. This will cause these diodes
to become forward-biased and start conducting current into
the substrate. These diodes can conduct a maximum of 10 mA
without causing irreversible damage to the part. The capacitor
C1 in Figure 7 is typically about 4 pF and can primarily be
attributed to pin capacitance. The resistor R1 is a lumped
component made up of the on resistance of a switch. This
resistor is typically about 100
. The capacitor C2 is the ADC
sampling capacitor and typically has a capacitance of 30pF. For
ac applications, removing high frequency components from the
analog input signal is recommended by use of a band-pass filter
on the relevant analog input pin. In applications where harmonic
distortion and signal-to-noise ratio are critical, the analog input
should be driven from a low impedance source. Large source
impedances will significantly affect the ac performance of the
ADC. This may necessitate the use of an input buffer amplifier.
The choice of the op amp will be a function of the particular
application.
V
DD
V
IN
C1
4pF
D2
D1
R1
C2
30pF
CONVERSION PHASE - SWITCH OPEN
TRACK PHASE - SWITCH CLOSED
Figure 7. Equivalent Analog Input Circuit
When no amplifier is used to drive the analog input, the source
impedance should be limited to low values. The maximum source
impedance will depend on the amount of total harmonic distortion
(THD) that can be tolerated. The THD will increase as the source
impedance increases and performance will degrade. Figure 8
shows a graph of the total harmonic distortion versus source
impedance for different analog input frequencies when using
a supply voltage of 2.7 V and sampling at a rate of 605 kSPS.
Figures 9 and 10 each show a graph of the total harmonic
distortion versus analog input signal frequency for various supply
voltages while sampling at 993 kSPS with an SCLK frequency of
20 MHz and 605 kSPS with an SCLK frequency of 12 MHz,
respectively.
SOURCE IMPEDANCE –
0
10
T
–10
–20
–30
–40
–50
–60
–70
100
1k
–80
–90
–100
V
DD
= 2.7V
f
S
= 605kSPS
f
IN
= 200kHz
f
IN
= 300kHz
f
IN
= 10kHz
f
IN
= 100kHz
1
10k
Figure 8. THD vs. Source Impedance for Various Analog
Input Frequencies
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