參數(shù)資料
型號(hào): AD7490BRU
廠商: ANALOG DEVICES INC
元件分類(lèi): ADC
英文描述: 16-Channel, 1 MSPS, 12-Bit ADC with Sequencer in 28-Lead TSSOP
中文描述: 16-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO28
封裝: MO-153AE, TSSOP-28
文件頁(yè)數(shù): 18/24頁(yè)
文件大?。?/td> 2255K
代理商: AD7490BRU
–18–
AD7490
REV. A
that another device may still take control of the bus. It will not
lead to a bus contention (e.g., a 10 k
pull-up or pull-down
resistor would be sufficient to overdrive the logic level of ADD3
between conversions) and all 16 channels may be identified.
However, if this does happen and another device takes control of
the bus, it is not guaranteed that DOUT will be fully driven to
ADD3 again in time for the read operation when control of the
bus is taken back.
This is especially useful if using an automatic sequence mode to
identify to which channel each result corresponds. Obviously, if
only the first eight channels are in use, then address bit ADD3
does not need to be decoded, and whether it is successfully clocked
in as a 1 or 0 will not matter as long as it is still counted by the
DSP/micro as the MSB of the 16-bit serial transfer.
POWER VERSUS THROUGHPUT RATE
By operating the AD7490 in Auto Shutdown or Auto Standby
Mode, the average power consumption of the ADC decreases at
lower throughput rates. Figure 19 shows how as the throughput
rate is reduced, the part remains in its shutdown state longer and
the average power consumption over time drops accordingly.
For example if the AD7490 is operated in a continuous sampling
mode with a throughput rate of 100 kSPS and an SCLK of 20 MHz
(V
DD
= 5 V), with PM1 = 0 and PM0 = 1, i.e., the device is in
Auto Shutdown Mode, then the power consumption is calcu-
lated as follows:
The maximum power dissipation during normal operation is
12.5 mW (V
DD
= 5 V). If the power-up time from Auto Shutdown
is one dummy cycle, i.e., 1
μ
s, and the remaining conversion time is
another cycle, i.e., 1
μ
s, then the AD7490 can be said to dissipate
12.5 mW for 2
μ
s during each conversion cycle. For the remainder
of the conversion cycle, 8
μ
s, the part remains in Shutdown Mode.
The AD7490 can be said to dissipate 2.5
μ
W for the remaining
8
μ
s of the conversion cycle. If the throughput rate is 100 kSPS,
the cycle time is 10
μ
s and the average power dissipated during
each cycle is
10
2
12 5
8
10
2 5
.
×
×
μ
.
m
m
W +
W =2 502
W
When operating the AD7490 in Auto Standby Mode, PM1 =
PM0 = 0 at 5 V, 100 kSPS, the AD7490 power dissipation is calcu-
lated as follows:
The maximum power dissipation is 12.5 mW at 5 V during normal
operation. Again the power-up time from Auto Standby is one
dummy cycle, 1
μ
s, and the remaining conversion time is another
dummy cycle, 1
μ
s. The AD7490 dissipates 12.5 mW for 2
μ
s during
each conversion cycle. For the remainder of the conversion cycle,
8
μ
s, the part remains in Standby Mode, dissipating 460
μ
W for
8
μ
s. If the throughput rate is 100 kSPS, the cycle time is 10
μ
s
and the average power dissipated during each conversion cycle is
10
2
12 5
8
10
460
×
×
.
W +
m
W =2 868
W
m
Figure 19 shows the power versus throughput rate when using both
the Auto Shutdown Mode and Auto Standby Mode with 5 V
supplies. At the lower throughput rates, power consumption for the
Auto Shutdown Mode is lower than that for the Auto Standby
Mode, with the AD7490 dissipating less power when in Shutdown
compared to Standby. However as the throughput rate is increased,
the part spends less time in power-down states, hence difference
in power dissipated is negligible between modes. For 3 V supplies,
the power consumption of the AD7490 decreases. Similar power
calculations can be done at 3 V.
THROUGHPUT – kSPS
10
1
0.01
P
0.1
0
50
250
100
150
200
350
300
V
DD
5V
AUTO STANDBY
AUTO SHUTDOWN
Figure 19. Power vs. Throughput Rate
in Auto Shutdown and Auto Standby Mode
MICROPROCESSOR INTERFACING
The serial interface on the AD7490 allows the part to be directly
connected to a range of many different microprocessors. This
section explains how to interface the AD7490 with some of the
more common microcontroller and DSP serial interface protocols.
AD7490 to TMS320C541
The serial interface on the TMS320C541 uses a continuous serial
clock and frame synchronization signals to synchronize the data
transfer operations with peripheral devices like the AD7490.
The
CS
input allows easy interfacing between the TMS320C541
and the AD7490 without any glue logic required. The serial port
of the TMS320C541 is set up to operate in burst mode with inter-
nal CLKX0 (TX serial clock on serial port 0) and FSX0 (TX frame
sync from serial port 0). The Serial Port Control Register (SPC)
must have the following setup: FO = 0, FSM = 1, MCM = 1, and
TXM = 1. The connection diagram is shown in Figure 20. It should
be noted that for signal processing applications, it is imperative
that the frame synchronization signal from the TMS320C541
will provide equidistant sampling. The V
DRIVE
pin of the AD7490
takes the same supply voltage as that of the TMS320C541. This
allows the ADC to operate at a higher voltage than the serial
interface, i.e., TMS320C541, if necessary.
TMS320C541
*
AD7490
CLKX
CLKR
DR
DT
FSX
FSR
V
DD
SCLK
DOUT
DIN
CS
V
DRIVE
*
ADDITIONAL PINS REMOVED FOR CLARITY
Figure 20. Interfacing to the TMS320C541
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