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參數(shù)資料
| 型號(hào)： | AD75004KPZ |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 2/4頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 12BIT QUAD W/BUFF 28-PLCC |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 設(shè)置時(shí)間： | 4µs |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 4 |
| 電壓電源： | 雙 ± |
| 功率耗散（最大）： | 720mW |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 28-LCC（J 形引線） |
| 供應(yīng)商設(shè)備封裝： | 28-PLCC（11.51x11.51） |
| 包裝： | 管件 |
| 輸出數(shù)目和類(lèi)型： | 4 電壓，雙極 |
| 采樣率（每秒）： | * |
REV. A
–2–
AD75004–SPECIFICATIONS (T
A = +25 C,
12.0 V power supplies unless otherwise noted)
Parameter
Symbol
Min
Typ
Max
Units
DIGITAL INPUTS (D0–D7, A0–A3, CS, WR)
Logic Levels (TTL Compatible)
Input Voltage, Logic “1”
VIH
2.0
5.5
V
Input Voltage, Logic “0”
VIL
0
0.8
V
Input Current, VIH = 5.5 V
IIH
10
A
Input Current, VIL = 0.8 V
IIL
10
A
Input Capacitance
CIN
10
pF
ACCURACY
Resolution
12
Bits
Integral Linearity Error
±1/4
1/2
LSB
Integral Linearity Error, TMIN to TMAX
±1/2
±3/4
LSB
Differential Linearity Error
±1/2
3/4
LSB
Differential Linearity Error, TMIN to TMAX
Guaranteed Monotonic
Gain (Full-Scale) Error
1
±2
10
LSB
Gain Error Drift, TMIN to TMAX
1
±15
±30
ppm/
°C
Bipolar Zero Error
1
±1
2
LSB
Bipolar Zero Error Drift, TMIN to TMAX
1
±3
±7
ppm/
°C
CHANNEL-TO-CHANNEL MISMATCH
Integral Linearity Error
±1/2
1
LSB
Gain Error1
±1
4
LSB
Bipolar Zero Error
1
±1
2
LSB
DYNAMIC PERFORMANCE
Settling Time to
±0.01% of FSR
for FSR Change, 2 k
|| 500 pF Load
2
4
s
Slew Rate, 2 k
|| 500 pF Load
5
V/
s
Digital Input Crosstalk (Static)
2
–50
dB
ANALOG OUTPUTS
Full-Scale Range (FSR)
VOUT
±5V
Output Current
IOUT
±5mA
Short Circuit Limit Current
40
mA
VOLTAGE REFERENCE
Reference Output Voltage
VREFOUT
4.97
5.00
5.03
V
Temperature Coefficient
±15
±25
ppm/
°C
Reference Output Currents3
3.0
5.0
mA
Reference Input Voltage
VREFIN
4.5
5.0
5.5
V
Reference Input Current @ 5.0 V
IREFIN
3.0
mA
POWER SUPPLY GAIN SENSITIVITY
Gain/V
DD, VDD = +10.8 to +13.2 V dc
1
±15
25
ppm of FSR/%
Gain/V
SS, VSS = –10.8 to –13.2 V dc
1
±15
25
ppm of FSR/%
POWER SUPPLY REQUIREMENTS
Voltage Range
VDD, VSS
10.8
±12
13.2
V
Supply Currents
IDD, ISS
±25
30
mA
TEMPERATURE RANGE
Specification
TMIN, TMAX
0
+70
°C
Storage
–65
+150
°C
NOTES
1Gain and bipolar zero errors are measured using internal voltage reference and include its errors.
2Digital crosstalk is defined as the change in any one output’s steady state value as a result of any other output being driven from V
OUTMIN to VOUTMAX into a
2 k
|| 500 pF load by means of varying the digital input code.
3The internal voltage reference is intended to drive on-chip only; buffer it if using it externally.
4All minimum and maximum specifications are guaranteed, and specifications shown in boldface are tested on all production units at final electrical test. Results from
those tests are used to calculate outgoing quality levels.
Specifications subject to change without notice.
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