Limit, TA = +25 C Limit, T
參數(shù)資料
型號(hào)： AD7524JNZ
廠商： Analog Devices Inc
文件頁數(shù)： 2/8頁
文件大?。?/td> 0K
描述： IC DAC 8BIT MULTIPLYING 16-DIP
產(chǎn)品培訓(xùn)模塊： Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝： 25
設(shè)置時(shí)間： 250ns
位數(shù)： 8
數(shù)據(jù)接口： 并聯(lián)
轉(zhuǎn)換器數(shù)目： 1
電壓電源： 單電源
功率耗散（最大）： 30mW
工作溫度： -40°C ~ 85°C
安裝類型： 通孔
封裝/外殼： 16-DIP（0.300"，7.62mm）
供應(yīng)商設(shè)備封裝： 16-PDIP
包裝： 管件
輸出數(shù)目和類型： 2 電流，單極；2 電流，雙極
采樣率（每秒）： 4M
產(chǎn)品目錄頁面： 784 (CN2011-ZH PDF)
REV. B
–2–
AD7524–SPECIFICATIONS
Limit, TA = +25 C
Limit, TMIN, TMAX
1
Parameter
VDD = +5 V VDD = +15 V VDD = 5 V
VDD = +15 V Units
Test Conditions/Comments
STATIC PERFORMANCE
Resolution
8
Bits
Relative Accuracy
J, A, S Versions
±1/2
LSB max
K, B, T Versions
±1/2
±1/4
±1/2
±1/4
LSB max
L, C, U Versions
±1/2
±1/8
±1/2
±1/8
LSB max
Monotonicity
Guaranteed Guaranteed
Guaranteed
Gain Error
2
±2 1/2
±1 1/4
±3 1/2
±1 1/2
LSB max
Average Gain TC
3
±40
±10
±40
±10
ppm/
°C
Gain TC Measured from +25
°C to
TMIN or from +25°C to TMAX
DC Supply Rejection,
3
Gain/V
DD
0.08
0.02
0.16
0.04
% FSR/% max
V
DD = ± 10%
0.002
0.001
0.01
0.005
% FSR/% typ
Output Leakage Current
IOUT1 (Pin 1)
±50
±400
±200
nA max
DB0–DB7 = 0 V; WR, CS = 0 V; VREF = ±10 V
IOUT2 (Pin 2)
±50
±400
±200
nA max
DB0–DB7 = VDD; WR, CS = 0 V; VREF =
±10 V
DYNAMIC PERFORMANCE
Output Current Settling Time
3
(to 1/2 LSB)
400
250
500
350
ns max
OUT1 Load = 100
, C
EXT = 13 pF; WR, CS =
0 V; DB0–DB7 = 0 V to VDD to 0 V.
AC Feedthrough
3
at OUT1
0.25
0.5
% FSR max
VREF = ±10 V, 100 kHz Sine Wave; DB0–DB7 =
at OUT2
0.25
0.5
% FSR max
0 V; WR, CS = 0 V
REFERENCE INPUT
RIN (Pin 15 to GND)
4
5
555
k
min
20
k
max
ANALOG OUTPUTS
Output Capacitance
3
COUT1 (Pin 1)
120
pF max
DB0–DB7 = VDD; WR, CS = 0 V
COUT2 (Pin 2)
30
pF max
COUT1 (Pin 1)
30
pF max
DB0–DB7 = 0 V; WR, CS = 0 V
COUT2 (Pin 2)
120
pF max
DIGITAL INPUTS
Input HIGH Voltage Requirement
VIH
+2.4
+13.5
+2.4
+13.5
V min
Input LOW Voltage Requirement
VIL
+0.8
+1.5
+0.5
+1.5
V max
Input Current
IIN
±1
±10
A max
VIN = 0 V or VDD
Input Capacitance
3
DB0–DB7
5
pF max
VIN = 0 V
WR
, CS
20
pF max
VIN = 0 V
SWITCHING CHARACTERISTICS
Chip Select to Write Setup Time
5
See Timing Diagram
tCS
tWR = tCS
AD7524J, K, L, A, B, C
170
100
220
130
ns min
AD7524S, T, U
170
100
240
150
ns min
Chip Select to Write Hold Time
tCH
All Grades
0
ns min
Write Pulse Width
tWR
tCS ≥ tWR, tCH ≥ 0
AD7524J, K, L, A, B, C
170
100
220
130
ns min
AD7524S, T, U
170
100
240
150
ns min
Data Setup Time
tDS
AD7524J, K, L, A, B, C
135
60
170
80
ns min
AD7524S, T, U
135
60
170
100
ns min
Data Hold Time
tDH
All Grades
10
ns min
POWER SUPPLY
IDD
1
2
mA max
All Digital Inputs VIL or VIH
100
500
A max
All Digital Inputs 0 V or VDD
NOTES
1Temperature ranges as follows: J, K, L versions: –40
°C to +85°C
A, B, C versions: –40
°C to +85°C
S, T, U versions: –55
°C to +125°C
2Gain error is measured using internal feedback resistor. Full-Scale Range (FSR) = V
REF.
3Guaranteed not tested.
4DAC thin-film resistor temperature coefficient is approximately –300 ppm/
°C.
5AC parameter, sample tested @ +25
°C to ensure conformance to specification.
Specifications subject to change without notice.
(VREF = +10 V, VOUT1 = VOUT2 = 0 V, unless otherwise noted)
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