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參數(shù)資料
| 型號(hào)： | AD7528BQ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 7/8頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 8BIT DUAL MULT 20-CDIP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 18 |
| 設(shè)置時(shí)間： | 400ns |
| 位數(shù)： | 8 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 450mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 20-CDIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 20-CDIP |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 2 電流，單極；2 電流，雙極 |
AD7528
REV. B
–7–
CIRCUIT EQUATIONS
CC
R
12
4
5
==
=
,,
f
RC
Q
R
A
R
C
F
FBB
O
F
S
=
=×
=
1
21 1
3
4
1
π
–
NOTE
DAC Equivalent Resistance
Equals
256
×()
DAC Ladder
sis
ce
DAC Digital Code
Re tan
MICROPROCESSOR INTERFACE
ADDRESS BUS
A**
A + 1**
ADDRESS
DECODE
LOGIC
DAC A/DAC B
CS
DAC A
DB0
DB7
WR
VMA
2
AD7528*
DAC B
DATA BUS
D0–D7
A0–A15
CPU
6800
*ANALOG CIRCUITRY HAS BEEN OMITTED FOR CLARITY
**A = DECODED 7528 ADDR DAC A
A + 1 = DECODED 7528 ADDR DAC B
Figure 11. AD7528 Dual DAC to 6800 CPU Interface
ADDRESS BUS
A**
A + 1**
DAC A/DAC B
CS
DAC A
DB0
DB7
WR
AD7528*
DAC B
ADDR/DATA BUS
AD0–AD7
A8–A15
CPU
8085
*ANALOG CIRCUITRY HAS BEEN OMITTED FOR CLARITY
**A = DECODED 7528 ADDR DAC A
A + 1 = DECODED 7528 ADDR DAC B
NOTE:
8085 INSTRUCTION SHLD (STORE H & L DIRECT) CAN UPDATE
BOTH DACs WITH DATA FROM H AND L REGISTERS
ADDRESS
DECODE
LOGIC
LATCH
8212
WR
ALE
Figure 12. AD7528 Dual DAC to 8085 CPU Interface
PROGRAMMABLE WINDOW COMPARATOR
VREF A
RFB A
VCC
DATA
INPUTS
DAC A/DAC B
CS
WR
PASS/
FAIL
OUTPUT
1k
AD7528
DB0
DB7
DAC A
DAC B
OUT A
VDD
VREF B
+VREF
RFB B
3
2
7
AD311
COMPARATOR
OUT B
3
2
7
AD311
COMPARATOR
TEST INPUT
0 TO –VREF
Figure 13. Digitally Programmable Window Comparator
(Upper and Lower Limit Detector)
PROGRAMMABLE STATE VARIABLE FILTER
In this state variable or universal filter configuration (Figure 14)
DACs A1 and B1 control the gain and Q of the filter character-
istic while DACs A2 and B2 control the cutoff frequency, fC.
DACs A2 and B2 must track accurately for the simple expres-
sion for fC to hold. This is readily accomplished by the AD7528.
Op amps are 2
× AD644. C3 compensates for the effects of op
amp gain bandwidth limitations.
DAC A/DAC B
CS WR
VIN
VDD
DB0–DB7
DATA 1
DAC B1
RF
AD7528
DAC A/DAC B
CS WR
A3
VDD
DB0–DB7
DATA 2
AD7528
A2
A1
R3
10k
DAC A1
RS
DAC A2
R1
HIGH
PASS
OUTPUT
R4
30k
R5
30k
C3
47pF
C1
1000pF
DAC B2
R2
A4
C2
1000pF
LOW
PASS
OUTPUT
BAND
PASS
OUTPUT
Figure 14. Digitally Controlled State Variable Filter
The filter provides low pass, high pass and band pass outputs
and is ideally suited for applications where microprocessor
control of filter parameters is required, e.g., equalizer, tone
controls, etc.
Programmable range for component values shown is fC = 0 kHz
to 15 kHz and Q = 0.3 to 4.5.
In the circuit of Figure 13 the AD7528 is used to implement a
programmable window comparator. DACs A and B are loaded
with the required upper and lower voltage limits for the test,
respectively. If the test input is not within the programmed
limits, the pass/fail output will indicate a fail (logic zero).
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| AD7528CQ | 功能描述:IC DAC 8BIT DUAL MULT 20-CDIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:750 系列:- 設(shè)置時(shí)間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
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| AD7528JC/D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Digital-to-Analog Converter |
| AD7528JCWP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Digital-to-Analog Converter |
| AD7528JN | 功能描述:IC DAC 8BIT DUAL MULTIPLY 20-DIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:47 系列:- 設(shè)置時(shí)間:2µs 位數(shù):14 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:55µW 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:管件 輸出數(shù)目和類型:1 電流，單極；1 電流，雙極 采樣率（每秒）:* |
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