VDD = +10V TO +15V C1 33pF AD544L
參數(shù)資料
型號(hào): AD7545BQ
廠(chǎng)商: Analog Devices Inc
文件頁(yè)數(shù): 7/8頁(yè)
文件大?。?/td> 0K
描述: IC DAC 12BIT W/BUFF MULT 20-CDIP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 18
設(shè)置時(shí)間: 2µs
位數(shù): 12
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
工作溫度: -25°C ~ 85°C
安裝類(lèi)型: 通孔
封裝/外殼: 20-CDIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 20-CDIP
包裝: 管件
輸出數(shù)目和類(lèi)型: 1 電流,單極;1 電流,雙極
采樣率(每秒): *
AD7545
–7–
REV. A
A1
R1
10K
CMOS DATA BUS
VDD = +10V TO +15V
C1
33pF
AD544L
VO
AD544J
A2
R5
20k
R3
10k
R6
5k
+2V
R2
2k
1
2
8
4
VDD
R4
33.3k
DATA
AD7545
18
19
20
1
2
VDD
RFB
VREF
DB10–DB0
OUT1
AGND
4
MSB
3
DGND
AD584J
+5V
VDD = +10V TO +15V
Figure 10. Single Supply “Bipolar” Twos Complement
D/A
Converter
MICROPROCESSOR INTERFACING OF THE AD7545
The AD7545 can directly interface to both 8- and 16-bit micro-
processors via its 12-bit wide data latch using standard CS and
WR control signals.
A typical interface circuit for an 8-bit processor is shown in
Figure 11. This arrangement uses two memory addresses, one
for the lower eight bits of data to the DAC and one for the up-
per four bits of data into the DAC via the latch.
4
LATCH
CS
WR
8
AD7545
CS
DB11
DB8
WR
DB7
DB0
8
Q0*
Q1*
ADDRESS BUS
8-BIT DATA BUS
ADDRESS
DECODE
CPU
A15
A0
WR
D7
D0
* Q
0 = DECODED ADDRESS FOR DAC
Q1 = DECODED ADDRESS FOR LATCH
Figure 11. 8-Bit Processor to AD7545 Interface
Figure 12 shows an alternative approach for use with 8-bit
processors which have a full 16-bit wide address bus such as
6800, 8080, Z80 This technique uses the 12 lower address lines
of the processor address bus to supply data to the DAC, thus
each AD7545 connected in this way uses 4k bytes of address
locations. Data is written to the DAC using a single memory
write instruction. The address field of the instruction is orga-
nized so that the lower 12 bits contain the data for the DAC and
the upper 4 bits contain the address of the 4k block at which the
DAC resides.
12
AD7545
CS
DB11
DB0
WR
16-BIT ADDRESS BUS
DATA BUS
ADDRESS
DECODE
CPU
A15
A0
WR
D7
D0
Q0
4
Figure 12. Connecting the AD7545 to 8-Bit Processors via
the Address Bus
SUPPLEMENTAL APPLICATION MATERIAL
For further information on CMOS multiplying D/A converters
the reader is referred to the following texts:
Application Guide to CMOS Multiplying D/A converters
available from Analog Devices, Publication Number G479.
Gain Error and Gain Temperature Coefficient of CMOS
Multiplying DACS—Application Note, Publication Number
E630–10–6/81 available from Analog Devices.
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