參數(shù)資料
型號(hào): AD7545CQ
廠(chǎng)商: Analog Devices Inc
文件頁(yè)數(shù): 1/8頁(yè)
文件大小: 0K
描述: IC DAC 12BIT W/BUFF MULT 20-CDIP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 18
設(shè)置時(shí)間: 2µs
位數(shù): 12
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
工作溫度: -25°C ~ 85°C
安裝類(lèi)型: 通孔
封裝/外殼: 20-CDIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 20-CDIP
包裝: 管件
輸出數(shù)目和類(lèi)型: 1 電流,單極;1 電流,雙極
采樣率(每秒): *
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
AD7545
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
World Wide Web Site: http://www.analog.com
Fax: 617/326-8703
Analog Devices, Inc., 1997
CMOS 12-Bit
Buffered Multiplying DAC
FUNCTIONAL BLOCK DIAGRAM
19
16
17
20
1
2
3
18
AD7545
R
RFB
OUT 1
AGND
VDD
DGND
DB11–DB0
(PINS 4–15)
12
12-BIT
MULTIPLYING DAC
INPUT DATA LATCHES
VREF
WR
CS
FEATURES
12-Bit Resolution
Low Gain TC: 2 ppm/ C typ
Fast TTL Compatible Data Latches
Single +5 V to +15 V Supply
Small 20-Lead 0.3" DIP and 20-Terminal Surface Mount
Packages
Latch Free (Schottky Protection Diode Not Required)
Low Cost
Ideal for Battery Operated Equipment
PIN CONFIGURATIONS
DIP
LCCC
PLCC
GENERAL DESCRIPTION
The AD7545 is a monolithic 12-bit CMOS multiplying DAC
with onboard data latches. It is loaded by a single 12-bit wide
word and directly interfaces to most 12- and 16-bit bus systems.
Data is loaded into the input latches under the control of the CS
and WR inputs; tying these control inputs low makes the input
latches transparent, allowing direct unbuffered operation of the
DAC.
The AD7545 is particularly suitable for single supply operation
and applications with wide temperature variations.
The AD7545 can be used with any supply voltage from +5 V to
+15 V. With CMOS logic levels at the inputs the device dissi-
pates less than 0.5 mW for VDD = +5 V.
20 19
18
DB6
DB5
DB4
DB3
DB2
1
2
3
4
5
6
7
8
9
10
11 12
13
14
15
16
17
DGND
TOP VIEW
(Not to Scale)
PIN 1
IDENTIFIER
AGND
DB11 (MSB)
DB10
R
FB
DB9
V
REF
DB8
DB7
VDD
WR
OUT
1
CS
DB0 (LSB)
DB1
AD7545
14
13
12
11
17
16
15
20
19
18
10
9
8
1
2
3
4
7
6
5
TOP VIEW
(Not to Scale)
AD7545
OUT 1
WR
VDD
VREF
RFB
AGND
DGND
DB11 (MSB)
DB1
DB0 (MSB)
CS
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
20 19
1
2
3
18
14
15
16
17
4
5
6
7
8
9 1011 1213
TOP VIEW
(Not to Scale)
AD7545
DB11 (MSB)
DB10
DB9
DB8
DB7
VDD
WR
CS
DB0 (LSB)
DB1
DB6
DB5
DB4
DB3
DB2
DGND
AGND
OUT
1
V
REF
R
FB
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