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參數(shù)資料
| 型號： | AD7564AR-B |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 12/17頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 12BIT QUAD 3.3V LP 28SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 27 |
| 設(shè)置時(shí)間： | 500ns |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 4 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 50µW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 28-SOIC W |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 8 電流，單極；8 電流，雙極 |
| 采樣率（每秒）： | 1.8M |
REV.
AD7564
–4–
Parameter
A Grade
Units
Test Conditions/Comments
DYNAMIC PERFORMANCE
Output Voltage Settling Time
3.5
s typ
To 0.01% of Full-Scale Range. VREF = 0 V. DAC Latch Alter-
nately Loaded with all 0s and all 1s.
Digital to Analog Glitch Impulse
35
nV-s typ
Measured with VIOUT2 = 0 V and VREF = 0 V. DAC Register Alter-
nately Loaded with all 0s and all 1s.
Multiplying Feedthrough Error
–70
dB max
DAC Latch Loaded with all 0s.
Output Capacitance
100
pF max
All 1s Loaded to DAC
40
pF max
All 0s Loaded to DAC
Digital Feedthrough
5
nV-s typ
Feedthrough to Any DAC Output with FSIN HIGH and a Square
Wave Applied to SDIN and CLKIN
Total Harmonic Distortion
–76
dB typ
Output Noise Spectral Density
@ 1 kHz
20
nV/
√Hz typ All 1s Loaded to DAC. V
IOUT2 = 0 V; VREF = 0 V
(VDD = +3 V to +5.5 V; VIOUT1 = VIOUT2 = 1.23 V; AGND = 0 V. VREF = 1 kHz, 2.45 V p-p, sine wave biased at 1.23 V; DAC
output op amp is AD820; TA = TMIN to TMAX, unless otherwise noted. These characteristics are included for Design
Guidance and are not subject to test.)
Biased Mode
AC Performance Characteristics
Parameter
B Grade
Units
Test Conditions/Comments
DYNAMIC PERFORMANCE
Output Voltage Settling Time
550
ns typ
To 0.01% of Full-Scale Range. DAC Latch Alternately Loaded
with All 0s and All 1s
Digital-to-Analog Glitch Impulse
35
nV-s typ
Measured with VREF = 0 V. DAC Register Alternately Loaded
with All 0s and All 1s
Multiplying Feedthrough Error
–70
dB max
VREF = 20 V p-p, 10 kHz Sine Wave. DAC Latch Loaded
with All 0s
Output Capacitance
60
pF max
All 1s Loaded to DAC
30
pF max
All 0s Loaded to DAC
Channel-to-Channel Isolation
–76
dB typ
Feedthrough from Any One Reference to the Others with
20 V p-p, 10 kHz Sine Wave Applied
Digital Crosstalk
5
nV-s typ
Effect of All 0s to All 1s Code Transition on Nonselected DACs
Digital Feedthrough
5
nV-s typ
Feedthrough to Any DAC Output with FSIN High and Square
Wave Applied to SDIN and SCLK
Total Harmonic Distortion
–83
dB typ
VREF = 6 V rms, 1 kHz Sine Wave
Output Noise Spectral Density
@ 1 kHz
30
nV/
√Hz typ All 1s Loaded to the DAC. V
REF = 0 V. Output Op Amp Is
ADOP07
Normal Mode
(VDD = +4.75 V to +5.25 V; VIOUT1 = VIOUT2 = AGND = 0 V. VREF = 6 V rms, 1 kHz sine wave; DAC output op amp is
AD843; TA = TMIN to TMAX, unless otherwise noted. These characteristics are included for Design Guidance and are
not subject to test.)
AC Performance Characteristics
B
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相關(guān)代理商/技術(shù)參數(shù) |
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| AD7564AR-BREEL | 制造商:Analog Devices 功能描述:DAC 4-CH R-2R 12-bit 28-Pin SOIC W T/R 制造商:Analog Devices 功能描述:DAC 4-CH R-2R 12-BIT 28SOIC W - Tape and Reel |
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| AD7564ARS-BREEL | 功能描述:IC DAC 12BIT QUAD 3.3V LP 28SSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:750 系列:- 設(shè)置時(shí)間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
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| AD7564ARSZ-BREEL | 功能描述:IC DAC 12BIT QUAD 3.3V LP 28SSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:750 系列:- 設(shè)置時(shí)間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
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