參數(shù)資料
型號(hào): AD7564BRS-REEL
廠商: Analog Devices Inc
文件頁(yè)數(shù): 7/17頁(yè)
文件大小: 0K
描述: IC DAC 12BIT QUAD 5V LP 28-SSOP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 1,500
設(shè)置時(shí)間: 500ns
位數(shù): 12
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 4
電壓電源: 單電源
功率耗散(最大): 50µW
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 28-SSOP(0.209",5.30mm 寬)
供應(yīng)商設(shè)備封裝: 28-SSOP
包裝: 帶卷 (TR)
輸出數(shù)目和類(lèi)型: 8 電流,單極;8 電流,雙極
采樣率(每秒): 1.8M
–15–
REV.
3
AD7564
APPLICATIONS
Programmable State Variable Filter
The AD7564 with its multiplying capability and fast settling
time is ideal for many types of signal conditioning applications.
The circuit of Figure 25 shows its use in a state variable filter
design. This type of filter has three outputs: low pass, high pass
and bandpass. The particular version shown in Figure 25 uses
the AD7564 to control the critical parameters fO, Q and AO. In-
stead of several fixed resistors, the circuit uses the DAC equiva-
lent resistances as circuit elements.
Thus, R1 in Figure 25 is controlled by the 12-bit digital word
loaded to DAC A of the AD7564. This is also the case with R2,
R3 and R4. The fixed resistor R5 is the feedback resistor, RFBB.
DAC Equivalent Resistance, REQ = (RLADDER
× 4096)/N
where: RLADDER is the DAC ladder resistance
N is the DAC Digital Code in Decimal (0 < N < 4096)
In the circuit of Figure 25:
C1 = C2, R7 = R8, R3 = R4 (i.e., the same code is loaded to
each DAC).
Resonant Frequency, fO = 1/(2 π R3C1)
Quality Factor, Q = (R6/R8)
× (R2/R5)
Bandpass Gain, AO = –R2/R1
Using the values shown in Figure 25, the Q range is 0.3 to 5 and
the fO range is 0 to 12 kHz.
R8
30k
HIGH
PASS
OUTPUT
C1 1000pF
C2 1000pF
LOW
PASS
OUTPUT
A2
A3
A4
A1
C3 10pF
BAND
PASS
OUTPUT
R6
10k
VIN
VREFA
IOUT1AIOUT1BRFBBVREFCIOUT1CVREFDIOUT1D
VREFB
AD7564
IOUT2AIOUT2BIOUT2CIOUT2D
DAC B
(R2)
DAC C
(R3)
DAC D
(R4)
R7
30k
R5
DAC A
(R1)
AGND
NOTES
1. A1, A2, A3, A4, : 1/4 X AD713.
2. DIGITAL INPUT CONNECTIONS ARE OMITTED.
3. C3 IS A COMPENSATION CAPACITOR TO ELIMINATE Q AND GAIN VARIATIONS
CAUSED BY AMPLIFIER GAIN AND BANDWIDTH LIMITATIONS.
Figure 25. Programmable 2nd Order State Variable Filter
B
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