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參數資料
| 型號： | AD7610BSTZ-RL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | 16-Bit, 250 kSPS, Unipolar/Bipolar Programmable Input PulSAR ADC |
| 中文描述： | 1-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PQFP48 |
| 封裝： | LEAD FREE, MO-026BBC, LQFP-48 |
| 文件頁數： | 24/32頁 |
| 文件大?。?/td> | 591K |
| 代理商： | AD7610BSTZ-RL |
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AD7610
8-Bit Interface (Master or Slave)
The BYTESWAP pin allows a glueless interface to an 8-bit bus.
As shown in Figure 38, when BYTESWAP is low, the LSB byte
is output on D[7:0] and the MSB is output on D[15:8]. When
BYTESWAP is high, the LSB and MSB bytes are swapped; the
LSB is output on D[15:8] and the MSB is output on D[7:0]. By
connecting BYTESWAP to an address line, the 16-bit data can
be read in two bytes on either D[15:8] or D[7:0]. This interface
can be used in both master and slave parallel reading modes.
Rev. 0 | Page 24 of 32
CS
RD
BYTESWAP
PINS D[15:8]
PINS D[7:0]
HI-Z
HI-Z
HIGH BYTE
LOW BYTE
LOW BYTE
HIGH BYTE
HI-Z
HI-Z
t
12
t
12
t
13
0
Figure 38. 8-Bit and 16-Bit Parallel Interface
SERIAL INTERFACE
The AD7610 has a serial interface (SPI-compatible) multiplexed
on the data pins D[15:2]. The AD7610 is configured to use the
serial interface when SER/PAR is held high.
Data Interface
The AD7610 outputs 16 bits of data, MSB first, on the SDOUT pin.
This data is synchronized with the 16 clock pulses provided on
the SDCLK pin. The output data is valid on both the rising and
falling edge of the data clock.
Serial Configuration Interface
The AD7610 can be configured through the serial configuration
register only in serial mode as the serial configuration pins are
also multiplexed on the data pins D[15:12]. See the Hardware
Configuration section and Software Configuration section for
more information.
MASTER SERIAL INTERFACE
The pins multiplexed on D[10:2] and used for the master serial
interface are: DIVSCLK[0], DIVSCLK[1], EXT/INT, INVSYNC,
INVSCLK, RDC, SDOUT, SDCLK and SYNC.
Internal Clock (SER/PAR = High, EXT/INT = Low)
The AD7610 is configured to generate and provide the serial
data clock, SDCLK, when the EXT/INT pin is held low. The
AD7610 also generates a SYNC signal to indicate to the host
when the serial data is valid. The SDCLK, and the SYNC signals
can be inverted, if desired using the INVSCLK and INVSYNC
inputs, respectively. Depending on the input, RDC, the data can
be read during the following conversion or after each conver-
sion. Figure 39 and Figure 40 show detailed timing diagrams of
these two modes.
Read After Convert (RDC = Low, DIVSCLK[1:0] = [0 to 3])
Setting RDC = low, allows the read after conversion mode.
Since the AD7610 is limited to 250kSPS and the time between
conversions, t2 = 4
μ
s, this mode is the most recommended
serial mode. Unlike the other serial modes, the BUSY signal
returns low after the 16 data bits are pulsed out and not at the
end of the conversion phase, resulting in a longer BUSY width
(See Table 4 for BUSY timing specifications). The
DIVSCLK[1:0] inputs control the SDCLK period and SDOUT
data rate. As a result, the maximum throughput can only be
achieved in two of the DIVSCLK[1:0] settings. In this mode, the
AD7610 generates a discontinuous SDCLK however, a fixed
period and hosts supporting both SPI and serial ports can also
be used.
Read During Convert (RDC = High)
Setting RDC = high, allows the master read (previous conver-
sion result) during conversion mode. In this mode, the serial
clock and data toggle at appropriate instances, minimizing
potential feed through between digital activity and critical
conversion decisions. In this mode, the SDCLK period changes
since the LSBs require more time to settle and the SDCLK is
derived from the SAR conver-sion cycle. In this mode, the
AD7610 generates a discontinuous SDCLK of two different
periods and the host should use an SPI interface.
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| AD7612 | 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Bit, 1 MSPS, Differential, Programmable Input PulSAR ADC |
| AD7612BCPZ | 功能描述:IC ADC 16BIT 750KSPS SAR 48LFCSP RoHS:是 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:PulSAR® 其它有關文件:TSA1204 View All Specifications 標準包裝:1 系列:- 位數:12 采樣率（每秒）:20M 數據接口:并聯 轉換器數目:2 功率耗散（最大）:155mW 電壓電源:模擬和數字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應商設備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數目和類型:4 個單端，單極；2 個差分，單極 產品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
| AD7612BCPZ-RL | 功能描述:IC ADC 16BIT 750KSPS SAR 48LFCSP RoHS:是 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:PulSAR® 標準包裝:1 系列:- 位數:14 采樣率（每秒）:83k 數據接口:串行，并聯 轉換器數目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應商設備封裝:28-PDIP 包裝:管件 輸入數目和類型:1 個單端，雙極 |
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