參數(shù)資料
型號: AD7628TQ
廠商: ANALOG DEVICES INC
元件分類: DAC
英文描述: ECONOLINE: REC2.2-S_DRW(Z)/H* - 2.2W DIP Package- 1kVDC Isolation- Regulated Output- 4.5-9V, 9-18V, 18-36V, 36-72V Wide Input Range 2 : 1- UL94V-0 Package Material- Continuous Short Circiut Protection- Cost Effective- 100% Burned In- Efficiency to 84%
中文描述: DUAL, PARALLEL, 8 BITS INPUT LOADING, 8-BIT DAC, CDIP20
封裝: 0.300 INCH, CERDIP-20
文件頁數(shù): 7/8頁
文件大?。?/td> 193K
代理商: AD7628TQ
AD7628
–7–
REV. A
MICROPROCE SSOR INT E RFACE
Figure 11. AD7628 Dual DAC to 6800 CPU Interface
PROGRAMMABLE WINDOW COMPARAT OR
Figure 13. Digitally Programmable Window Comparator
(Upper and Lower Limit Detector)
PROGRAMMABLE ST AT E VARIABLE FILT E R
Figure 12. AD7628 Dual DAC to 8085 CPU Interface
In the circuit of Figure 13, the AD7628 is used to implement a
programmable window comparator. DACs A and B are loaded
with the required upper and lower voltage limits for the test,
respectively. If the test input is not within the programmed lim-
its, the pass/fail output will indicate a fail (logic zero).
In this state, variable or universal filter configuration (Figure
14) for DACs A1 and B1 control the gain and Q of the filter
characteristic, while DACs A2 and B2 control the cutoff fre-
quency, f
C
. DACs A2 and B2 must track accurately for the simple
expression for f
C
to hold. T his is readily accomplished by the
AD7628. Op amps are 2
×
AD644. C3 compensates for the
effects of op amp gain-bandwidth limitations.
T he filter provides low pass, high pass and band pass outputs
and is ideally suited for applications where microprocessor con-
trol of filter parameters is required, e.g., equalizer, tone con-
trols, etc.
Programmable range for component values shown is f
C
= 0 kHz
to 15 kHz and Q = 0.3 to 4.5.
Figure 14. Digitally Controlled State Variable Filter
CIRCUIT E QUAT IONS
C
1
= C
2
, R
1
= R
2
, R
4
= R
5
f
C
=
1
2
π
R
1
C
1
Q =
R
3
R
4
.
R
F
R
FBB
1
A
O
= –
R
F
R
S
NOT E
DAC equivalent resistance equals
(
DAC Digital Code
256
×
DAC Ladder resistance
)
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