參數(shù)資料
型號: AD7664ASTRL
廠商: ANALOG DEVICES INC
元件分類: ADC
英文描述: 16-Bit, 570 kSPS CMOS ADC
中文描述: 1-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, PQFP48
封裝: MS-026BBC, LQFP-48
文件頁數(shù): 4/19頁
文件大?。?/td> 392K
代理商: AD7664ASTRL
REV. 0
AD7664
–4–
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD7664 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
ABSOLUTE MAXIMUM RATINGS
1
Analog Inputs
IN
2
, REF . . . . . . . . . . . . AVDD + 0.3 V to AGND – 0.3 V
INGND, REFGND . . . . . . . . . . . . . . . . . . AGND
±
0.3 V
Ground Voltage Differences
AGND, DGND, OGND . . . . . . . . . . . . . . . . . . . . .
±
0.3 V
Supply Voltages
AVDD, DVDD, OVDD . . . . . . . . . . . . . . . . . . . . . . . . 7 V
AVDD to DVDD,
AVDD to OVDD . . . . . . . . . . . . . .
±
7 V
DVDD to OVDD . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
7 V
Digital Inputs
Except the Data Bus D(7:4) . . . –0.3 V to DVDD + 0.3 V
Data Bus Inputs D(7:4) . . . . . . –0.3 V to OVDD + 0.3 V
ORDERING GUIDE
Model
Temperature Range
–40
°
C to +85
°
C
–40
°
C to +85
°
C
Package Description
Package Option
AD7664AST
AD7664ASTRL
EVAL-AD7664CB
1
EVAL-CONTROL BOARD
2
Quad Flatpack (LQFP)
Quad Flatpack (LQFP)
Evaluation Board
Controller Board
ST-48
ST-48
NOTES
1
This board can be used as a standalone evaluation board or in conjunction with the EVAL-CONTROL BOARD for evaluation/demonstration purposes.
2
This board allows a PC to control and communicate with all Analog Devices evaluation boards ending in the CB designators.
Internal Power Dissipation
3
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150
°
C
Storage Temperature Range . . . . . . . . . . . . –65
°
C to +150
°
C
Lead Temperature Range
(Soldering 10 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . 300
°
C
. . . . . . . . . . . . . . . . . . . 700 mW
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2
See Analog Input section.
3
Specification is for device in free air:
48-Lead LQFP:
θ
JA
= 91
°
C/W,
θ
JC
= 30
°
C/W.
TIMING SPECIFICATIONS (Continued)
Symbol
Min
Typ
Max
Unit
Refer to Figures 18 and 20 (Slave Serial Interface Modes)
2
External SCLK Setup Time
External SCLK Active Edge to SDOUT Delay
SDIN Setup Time
SDIN Hold Time
External SCLK Period
External SCLK HIGH
External SCLK LOW
t
31
t
32
t
33
t
34
t
35
t
36
t
37
5
3
5
5
25
10
10
ns
ns
ns
ns
ns
ns
ns
16
NOTES
1
In warp mode only, the maximum time between conversions is 1 ms, otherwise, there is no required maximum time.
2
In serial interface modes, the SYNC, SCLK, and SDOUT timings are defined with a maximum load C
L
of 10 pF; otherwise, the load is 60 pF maximum.
3
If the polarity of SCLK is inverted, the timing references of SCLK are also inverted.
Specifications subject to change without notice.
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