參數(shù)資料
型號(hào)： AD7665AST
廠商： ANALOG DEVICES INC
元件分類(lèi)： ADC
英文描述： 16-Bit, 570 kSPS CMOS ADC
中文描述： 4-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, PQFP48
封裝： LOW PROFILE, MS-026BBC, QFP-48
文件頁(yè)數(shù)： 14/24頁(yè)
文件大?。?/td> 348K
代理商： AD7665AST
REV. 0
AD7665
–14–
TYPICAL CONNECTION DIAGRAM
Figure 5 shows a typical connection diagram for the AD7665.
Different circuitry shown on this diagram is optional and is
discussed below.
Analog Inputs
The AD7665 is specified to operate with six full-scale analog
input ranges. Connections required for each of the four ana-
log inputs, IND, INC, INB, INA, and the resulting full-scale
ranges, are shown in Table I. The typical input impedance
for each analog input range is also shown.
Figure 6 shows a simplified analog input section of the AD7665.
The four resistors connected to the four analog inputs form a
resistive scaler which scales-down and shifts the analog input
range to a common input range of 0 V to 2.5 V at the input of
the switched capacitive ADC.
INC
INB
INA
4R
2R
R
IND
4R
AGND
AVDD
R1
C
S
R = 1.28k
Figure 6. Simplified Analog Input
By connecting the four inputs INA, INB, INC, IND to the input
signal itself, the ground, or a 2.5 V reference, other analog input
ranges can be obtained.
The diodes shown in Figure 6 provide ESD protection for the
four analog inputs. The inputs INB, INC, IND, have a high
voltage protection (–11 V to +30 V) to allow wide input voltage
range. Care must be taken to ensure that the analog input signal
never exceeds the absolute ratings on these inputs including
INA (0 V to 5 V). This will cause these diodes to become forward-
biased and start conducting current. These diodes can handle a
forward-biased current of 120 mA maximum. For instance, when
using the 0 V to 2.5 V input range, these conditions could eventu-
ally occur on the input INA when the input buffer’s (U1) supplies
are different from AVDD. In such case, an input buffer with a
short-circuit current limitation can be used to protect the part.
This analog input structure allows the sampling of the differen-
tial signal between the output of the resistive scaler and INGND.
Unlike other converters, the INGND input is sampled at the
same time as the inputs. By using this differential input, small
signals common to both inputs are rejected as shown in Figure 7,
which represents the typical CMRR over frequency. For instance,
by using INGND to sense a remote signal ground, difference of
ground potentials between the sensor and the local ADC ground
are eliminated.
75
70
65
60
55
50
45
40
35
1 10 100 1000 10000
FREQUENCY
–
kHz
C
–
Figure 7. Analog Input CMRR vs. Frequency
During the acquisition phase for ac signals, the AD7665 behaves
like a one-pole RC filter consisting of the equivalent resistance
of the resistive scaler R/2 in series with R1 and C
S
. The resistor
R1 is typically 100
and is a lumped component made up of
some serial resistor and the on-resistance of the switches.
The capacitor C
S
is typically 60 pF and is mainly the ADC
sampling capacitor. This one-pole filter with a typical –3 dB
cutoff frequency of 3.6 MHz reduces undesirable aliasing effects
and limits the noise coming from the inputs.
Except when using the 0 V to 2.5 V analog input voltage range,
the AD7665 has to be driven by a very low impedance source to
avoid gain errors. That can be done by using a driver amplifier
whose choice is eased by the primarily resistive analog input
circuitry of the AD7665.
When using the 0 V to 2.5 V analog input voltage range, the
input impedance of the AD7665 is very high so the AD7665 can
be driven directly by a low impedance source without gain error.
That allows, as shown in Figure 5, putting an external one-
pole RC filter between the output of the amplifier output and
the ADC analog inputs to even further improve the noise
filtering done by the AD7665 analog input circuit. However, the
source impedance has to be kept low because it affects the ac
performances, especially the total harmonic distortion (THD).
The maximum source impedance depends on the amount of
total THD that can be tolerated. The THD degradation is a
function of the source impedance and the maximum input
frequency as shown in Figure 8.
相關(guān)PDF資料
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AD7665ASTRL 16-Bit, 570 kSPS CMOS ADC
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